MT46H32M32LFCM-75 IT:A TR Micron Technology Inc, MT46H32M32LFCM-75 IT:A TR Datasheet - Page 91

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MT46H32M32LFCM-75 IT:A TR

Manufacturer Part Number
MT46H32M32LFCM-75 IT:A TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr

Specifications of MT46H32M32LFCM-75 IT:A TR

Organization
32Mx32
Density
1Gb
Address Bus
13b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 52: Deep Power-Down Mode
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
CKE
CK#
CK
All banks idle with no
activity on the data bus
1
Notes:
NOP
T0
1. Clock must be stable prior to CKE going HIGH.
2. DPD = deep power-down.
3. Upon exit of deep power-down mode, a full DRAM initialization sequence is required.
t
IS
DPD
T1
Enter deep power-down mode
2
T2
(
(
(
)
(
)
(
t
)
)
)
(
CKE
(
(
(
)
(
)
)
)
)
91
Ta0
1
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
Ta1
Exit deep power-down mode
T = 200µs
© 2007 Micron Technology, Inc. All rights reserved.
Ta2
NOP
Power-Down
Don’t Care
Ta3
PRE
3

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