MT46H32M32LFCM-75 IT:A TR Micron Technology Inc, MT46H32M32LFCM-75 IT:A TR Datasheet - Page 72

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MT46H32M32LFCM-75 IT:A TR

Manufacturer Part Number
MT46H32M32LFCM-75 IT:A TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr

Specifications of MT46H32M32LFCM-75 IT:A TR

Organization
32Mx32
Density
1Gb
Address Bus
13b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 35: Consecutive WRITE-to-WRITE
Figure 36: Nonconsecutive WRITE-to-WRITE
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
Command
Address
Address
DQS
DQS
DQ
DQ
CK#
CK#
DM
DM
CK
CK
3
3
Notes:
Notes:
WRITE
WRITE
Bank,
Col b
Bank,
Col b
T0
T0
1, 2
t
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D
1, 2
1. Each WRITE command can be to any bank.
2. An uninterrupted burst of 4 is shown.
3. D
t
DQSS (NOM)
DQSS (NOM)
IN
IN
b (n) = data-in for column b (n).
b (n) = data-in for column b (n).
NOP
NOP
D
D
T1
T1
b
b
IN
IN
T1n
T1n
b+1
b+1
D
D
IN
IN
WRITE
Bank,
Col n
b+2
b+2
D
NOP
D
T2
T2
IN
IN
1, 2
72
T2n
b+3
T2n
b+3
D
D
IN
IN
1Gb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
NOP
Col n
D
T3
T3
n
IN
1,2
Don’t Care
Don’t Care
T3n
n+1
D
IN
n+2
NOP
D
D
T4
T4
NOP
n
IN
IN
T4n
T4n
n+1
n+3
D
D
IN
IN
Transitioning Data
Transitioning Data
© 2007 Micron Technology, Inc. All rights reserved.
WRITE Operation
n+2
D
T5
NOP
T5
NOP
IN
T5n
n+3
D
IN

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