MT46V32M16D2TH-7L Micron Technology Inc, MT46V32M16D2TH-7L Datasheet - Page 66

• Manufacturer Part Number: MT46V32M16D2TH-7L
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V32M16D2TH-7L

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 750ps
• Maximum Clock Rate: 266MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

x4: A0-A9, A11, A12
TIMING PARAMETERS
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_A.p65 – Rev. A; Pub 10/00
SYMBOL
t
t
t
t
t
t
t
t
t
t
CH
CL
CK (2.5)
CK (2)
DH
DS
DQSH
DQSL
DQSS
DSS
x8: A0-A9, A11
x16: A11, A12
COMMAND
x16: A0-A9
BA0, BA1
x8: A12
NOTE: 1. DI n = data-out from column n; subsequent elements are provided in the programmed order.
DQS
DQ
MIN
CK#
CKE
A10
0.45
0.45
0.35
0.35
0.75
DM
7.5
0.5
0.5
0.2
CK
7
1
5
7. t DSH is applicable during t DQSS
-7
2. Burst length = 4 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T8.
5. PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these times.
8. t DSS is applicable during t DQSS
MAX
0.55
0.55
1.25
t
t
12
12
IS
IS
NOP 6
T0
t
t
IH
IH
MIN
0.45
0.45
0.35
0.35
0.75
7.5
0.5
0.5
0.2
10
-75
BANK WRITE – WITHOUT AUTO PRECHARGE
t
t
Bank x
IS
MAX
IS
0.55
0.55
1.25
ACT
T1
RA
RA
12
12
RA
t
t
IH
IH
t
CK
MIN
0.45
0.45
0.35
0.35
0.75
0.6
0.6
0.2
10
8
t
t
RCD
RAS
-8
NOP 6
T2
MAX
(MIN)
(MAX)
0.55
0.55
1.25
12
12
t
CH
and is referenced from CK T4 or T5.
and is referenced from CK T5 or T6.
UNITS
t
t
t
t
t
t
ns
ns
ns
ns
t
CK
CK
CK
CK
CK
CK
CL
WRITE 2
Bank x
t
IS
3
Col n
T3
t
t
IH
66
DQSS
t
WPRES
(NOM)
t DS
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
DSH
IH
IS
RAS
RCD
RP
WPRE
WPRES
WPST
WR
WPRE
NOP 6
T4
DI
b
t DH
T4n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DQSL
MIN
0.25
0.4
0.2
45
15
15
15
1
1
0
NOP 6
T5
-7
t
DQSH
120,000
MAX
0.6
T5n
512Mb: x4, x8, x16
t
WPST
MIN
0.25
0.4
0.2
20
20
45
15
0
1
1
NOP 6
T6
-75
120,000
MAX
0.6
DDR SDRAM
t
WR
NOP 6
MIN
T7
0.25
0.4
0.2
1.1
1.1
20
20
50
15
0
TRANSITIONING DATA
DON’T CARE
©2000, Micron Technology, Inc.
-8
ADVANCE
120,000
MAX
0.6
ALL BANKS
ONE BANK
Bank x 4
T8
PRE
UNITS
t
t
t
ns
ns
ns
ns
ns
CK
ns
CK
ns
CK
t
RP