LU82551ER 860613 Intel, LU82551ER 860613 Datasheet - Page 26

• Manufacturer Part Number: LU82551ER 860613
• Manufacturer: Intel

Specifications of LU82551ER 860613

• Lead Free Status / Rohs Status: Supplier Unconfirmed

82551ER — Networking Silicon
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Figure 3. CSR I/O Write Cycle
Write Accesses: The CPU, as the initiator, drives the address lines AD[31:0], the command and
byte enable lines C/BE#[3:0] and the control lines IRDY# and FRAME#. It also provides the
82551ER with valid data on each data access immediately after asserting IRDY#. The 82551ER
controls the TRDY# signal and asserts it from the data access. The 82551ER allows the CPU to
issue only one I/O write cycle to the Control/Status Registers, generating a disconnect by asserting
the STOP# signal. This is true for both memory mapped and I/O mapped accesses.
CLK
FRAME#
AD
C/BE#
IRDY#
TRDY#
DEVSEL#
STOP#
1
I/O WR
ADDR
2
3
DATA
BE#
4
5
6
7
8
9
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