LU82551ER 860613 Intel, LU82551ER 860613 Datasheet - Page 74

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LU82551ER 860613

Manufacturer Part Number
LU82551ER 860613
Description
Manufacturer
Intel
Datasheet

Specifications of LU82551ER 860613

Lead Free Status / Rohs Status
Supplier Unconfirmed
82551ER — Networking Silicon
9.3.3
9.3.4
66
Table 32. Register 17: PHY Unit Special Control
Table 33. Register 18: PHY Address
Table 34. Register 19: 100BASE-TX Receive False Carrier Counter
Register 18: PHY Address Register
Register 19: 100BASE-TX Receive False Carrier Counter
12
11
10
9
8
7
6
5
4
3
2
1
0
15:5
4:0
15:0
Bit(s)
Bit(s)
Bit(s)
Force 34
Transmit Pattern
Good Link
Reserved
Transmit Carrier
Sense Disable
Disable Dynamic
Power-Down
Auto-Negotiation
Loopback
MDI Tri-State
Filter By-pass
Auto Polarity
Disable
Squelch Disable
Extended
Squelch
Link Integrity
Disable
Jabber Function
Disable
Reserved
PHY Address
Receive False
Carrier
Name
Name
Name
1 = Force 34 transmit pattern
0 = Normal operation
1 = 100BASE-TX link good
0 = Normal operation
This bit is reserved and should be set to 0b.
1 = Transmit Carrier Sense disabled
0 = Transmit Carrier Sense enabled
1 = Dynamic Power-Down disabled
0 = Dynamic Power-Down enabled (normal)
1 = Auto-Negotiation loopback
0 = Auto-Negotiation normal mode
1 = MDI Tri-state (transmit driver tri-states)
0 = Normal operation
1 = By-pass filter
0 = Normal filter operation
1 = Auto Polarity disabled
0 = Normal polarity operation
1 = 10BASE-T squelch test disable
0 = Normal squelch operation
1 = 10BASE-T Extended Squelch control enabled
0 = 10BASE-T Extended Squelch control disabled
1 = Link disabled
0 = Normal Link Integrity operation
1 = Jabber disabled
0 = Normal Jabber operation
These bits are reserved and should be set to a
constant ‘0’
These bits are set to the PHY’s address, 00001b.
These bits are used for the false carrier counter.
Description
Description
Description
Default
Default
Default
--
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Datasheet
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
SC
R/W
R/W
R/W

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