IS43R16320D-6BLI ISSI, Integrated Silicon Solution Inc, IS43R16320D-6BLI Datasheet - Page 19

• Manufacturer Part Number: IS43R16320D-6BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS43R16320D-6BLI

• Lead Free Status / Rohs Status: Compliant

IS43R86400D
IS43/46R16320D, IS43/46R32160D
EXTENDED MODE REGISTER (EMR) DEFINITION
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional
functions include DLL enable/disable, and output drive strength selection. The Extended Mode Register is
programmed via the MODE REGISTER SET command (with BA1=0 and BA0=1) and will retain the stored information
until it is reprogrammed, or the device loses power. The Extended Mode Register must be loaded when all banks
are idle and no bursts are in progress, and the controller must wait the specified time tMRD before initiating any
subsequent operation. Violating either of these requirements will result in unspecified operation. Reserved states
should not be used, as unknown operation or incompatibility with future versions may result.
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power-up initialization, and upon
returning to normal operation after having disabled the DLL for the purpose of debug or evaluation (upon exiting Self
Refresh Mode, the DLL is enabled automatically). Any time the DLL is enabled a DLL Reset must follow and 200 clock
cycles must occur before any executable command can be issued.
OUTPUT DRIVE STRENGTH (DS)
The normal drive strength for all outputs is specified to be SSTL_2, Class II. This DRAM also supports a reduced
driver strength option, intended for lighter load and/or point-to-point environments. I--V curves for the normal drive
strength and weak drive strength are included in this datasheet.
EXTENDED MODE REGISTER
BA1 BA0
Integrated Silicon Solution, Inc.
Rev. 00A
09/14/09
BA1 BA0 Mode Register Definition
0
0
1
1
0
1
0
1
Program Mode Register
Program Extended Mode Register
Reserved
Reserved
A12
A11
A10
Reserved
A9
(1)
A8
A7
A6
A5
NOTES:
1. A logic 0 should be programmed to all unused/undefined ad-
dress bits to ensure future compatibility
A4
A3
A1 Drive Strength
0
1
A2
Normal
Reduced
A1
A0 DLL
0
1
A0
Enable
Disable
Ext. Mode Reg. (Ex)
Address Bus (Ax)
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