IS43R16320D-6BLI ISSI, Integrated Silicon Solution Inc, IS43R16320D-6BLI Datasheet - Page 22

• Manufacturer Part Number: IS43R16320D-6BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS43R16320D-6BLI

• Lead Free Status / Rohs Status: Compliant

IS43R86400D
IS43/46R16320D, IS43/46R32160D
IDD Specification Parameters and Test Conditions: x8, x16
(V
22
Symbol
dd
IDD4W
IDD2P
IDD3P
IDD3N
IDD4R
IDD2F
IDD0
IDD1
IDD5
IDD6
IDD7
= V
ddq
= 2.5V ± 0.2V (-5, -6), V
Parameter/ Test Condition
Operating current for one bank active-precharge; tRC = tRC(min);
tCK = tCK(min); DQ, DM and DQS inputs changing once per clock
cycle; address and control inputs changing once every two clock
cycles; CS = high between valid commands.
Operating current for one bank operation; one bank open, BL = 4,
tRC = tRC(min), tCK = tCK(min), Iout=0mA, Address and control
inputs changing once per clock cycle.
Precharge power-down standby current; all banks idle; power-down
mode; CKE VIL(max); tCK = tCK(min); VIN = VREF for DQ, DQS and
DM
Precharge floating standby current; CS VIH(min); all banks idle; CKE
VIH(min); tCK = tCK(min); address and other control inputs changing
once per clock cycle; VIN = VREF for DQ, DQS and DM
Active power-down standby current; one bank active; power-down
mode; CKE VIL(max); tCK = tCK(min); VIN = VREF for DQ, DQS and
DM
Active standby current; CS VIH(min); CKE VIH(min); one bank
active; tRC = tRAS(max); tCK = tCK(min); DQ, DQS and DM inputs
changing twice per clock cycle; address and other control inputs
changing once per clock cycle
Operating current for burst read; burst length = 2; reads; continuous
burst; one bank active; address and control inputs changing once per
clock cycle; tCK = tCK(min); 50% of data changing on every transfer;
lOUT = 0mA
Operating current for burst write; burst length = 2; writes; continuous
burst; one bank active address and control inputs changing once per
clock cycle; tCK = tCK(min); DQ, DM and DQS inputs changing twice
per clock cycle, 50% of input data changing at every transfer
Auto refresh current; tRC = tRFC(min);
Self refresh current; CKE 0.2V;
Operating current for four bank operation; four bank interleaving
READs (BL=4) with auto precharge; tRC = tRC(min), tCK = tCK(min);
Address and control inputs change only during ACTIVE, READ, or
WRITE commands
dd
= V
ddq
= 2.5V ± 0.1V (-4), Vss = VssQ = 0V, Output Open, unless otherwise noted)
155
195
210
215
345
480
Integrated Silicon Solution, Inc.
55
45
60
-4
5
6
155
195
210
215
345
480
55
45
60
-5
5
6
130
160
165
195
290
405
45
35
50
-6
5
5
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Rev. 00A
09/14/09