XC3SD1800A-4CS484I Xilinx Inc, XC3SD1800A-4CS484I Datasheet - Page 40
XC3SD1800A-4CS484I
Manufacturer Part Number
XC3SD1800A-4CS484I
Description
FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 484-Pin LCSBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD1800A-4CS484I
Package
484LCSBGA
Family Name
Spartan®-3A
Device Logic Units
37440
Device System Gates
1800000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
309
Ram Bits
1548288
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Clock Buffer/Multiplexer Switching Characteristics
Table 32: Clock Distribution Switching Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
T
T
F
GIO
GSI
BUFG
Symbol
The numbers in this table are based on the operating conditions set forth in
Global clock buffer (BUFG, BUFGMUX, BUFGCE) I input to
O-output delay
Global clock multiplexer (BUFGMUX) select S-input setup to I0 and
I1 inputs. Same as BUFGCE enable CE-input
Frequency of signals distributed on global buffers (all sides)
Description
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Table
7.
Minimum
–
–
0
0.22
0.56
350
-5
Speed Grade
Maximum
0.23
0.63
334
-4
Units
MHz
ns
ns
40
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