XC3SD1800A-4CS484I Xilinx Inc, XC3SD1800A-4CS484I Datasheet - Page 49

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XC3SD1800A-4CS484I

Manufacturer Part Number
XC3SD1800A-4CS484I
Description
FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 484-Pin LCSBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC3SD1800A-4CS484I

Package
484LCSBGA
Family Name
Spartan®-3A
Device Logic Units
37440
Device System Gates
1800000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
309
Ram Bits
1548288

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0
DNA Port Timing
Table 43: DNA_PORT Interface Timing
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
T
T
T
T
The minimum READ pulse width is 5 ns, and the maximum READ pulse width is 10 μs.
T
T
T
Symbol
T
T
T
DNADCKO
DNACLKH
DNACLKF
DNACLKL
DNADSU
DNARSU
DNASSU
DNADH
DNARH
DNASH
Setup time on SHIFT before the rising edge of CLK
Hold time on SHIFT after the rising edge of CLK
Setup time on DIN before the rising edge of CLK
Hold time on DIN after the rising edge of CLK
Setup time on READ before the rising edge of CLK
Hold time on READ after the rising edge of CLK
Clock-to-output delay on DOUT after rising edge of CLK
CLK frequency
CLK High time
CLK Low time
Description
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Min
1.0
0.5
1.0
0.5
5.0
0.0
0.5
0.0
1.0
1.0
10,000
Max
100
1.5
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
49

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