5T9306NLGI Integrated Device Technology (Idt), 5T9306NLGI Datasheet - Page 5

• Manufacturer Part Number: 5T9306NLGI
• Description: Clock Driver 2-IN LVDS 28-Pin VFQFPN EP Tray
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 5T9306NLGI

• Package: 28VFQFPN EP
• Configuration: 1 x 2:1
• Input Signal Type: CML|eHSTL|HSTL|LVDS|LVEPECL|LVPECL|LVTTL
• Maximum Output Frequency: 1000 MHz
• Maximum Quiescent Current: 240 mA
• Operating Supply Voltage: 2.5 V

DIFFERENTIAL INPUT AC TEST CONDITIONS FOR LVEPECL (2.5V) AND
LVPECL (3.3V)
NOTES:
1. The 732mV peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
2. 1082mV LVEPECL (2.5V) and 1880mV LVPECL (3.3V) crossing point levels are specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
IDT5T9306 Data Sheet
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR eHSTL
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
2. A 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the V
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
IDT5T9306 REVISION B JANUARY 31, 2011
Symbol
specification under actual use conditions.
This device meets the V
Symbol
specification under actual use conditions.
actual use conditions.
Symbol
specification under actual use conditions.
actual use conditions.
t
t
t
V
V
V
V
V
V
R
R
R
V
D
V
D
V
D
DIF
THI
DIF
THI
DIF
THI
, t
, t
, t
X
H
X
H
X
H
F
F
F
Parameter
Input Signal Swing
Differential Input Signal Crossing Point
Duty Cycle
Input Timing Measurement Reference Level
Input Signal Edge Rate
Parameter
Input Signal Swing
Differential Input Signal Crossing Point
Duty Cycle
Input Timing Measurement Reference Level
Input Signal Edge Rate
Parameter
Input Signal Swing
Differential Input Signal Crossing Point
Duty Cycle
Input Timing Measurement Reference Level
Input Signal Edge Rate
X
specification under actual use conditions.
(1)
(1)
(1)
(4)
(4)
(4)
(2)
(2)
(2)
(3)
(3)
(3)
LVEPECL
LVPECL
5
2.5V LVDS 1:6 CLOCK BUFFER TERABUFFER™ II
Crossing Point
Crossing Point
Crossing Point
©2011 Integrated Device Technology, Inc.
Value
Value
Value
1082
1880
732
750
900
50
50
50
2
1
2
1
2
X
X
specification under
specification under
Units
Units
Units
V/ns
V/ns
V/ns
mV
mV
mV
mV
%
%
%
V
V
V
V
V
DIF
DIF
DIF
(AC)
(AC)
(AC)