PN5120A0HN/C1 NXP Semiconductors, PN5120A0HN/C1 Datasheet - Page 21

• Manufacturer Part Number: PN5120A0HN/C1
• Description: Transmission Module 40-Pin HVQFN EP T/R
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C1

• Package: 40HVQFN EP
• Operating Temperature: -30 to 85 °C

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
9.2.1.3 CommIEnReg
Control bits to enable and disable the passing of interrupt requests.
Table 20.
Table 21.
Bit
7
6
5
4
3
2
1
0
Access
Rights
Symbol
IRqInv
TxIEn
RxIEn
IdleIEn
HiAlertIEn
LoAlertIEn Allows the low alert interrupt request (indicated by bit LoAlertIRq) to be
ErrIEn
TimerIEn
CommIEnReg register (address 02h); reset value: 80h, 10000000b
IRqInv
Description of CommIEnReg bits
r/w
7
All information provided in this document is subject to legal disclaimers.
Allows the receiver interrupt request (indicated by bit RxIRq) to be
Allows the timer interrupt request (indicated by bit TimerIRq) to be
Description
Set to logic 1, the signal on pin IRQ is inverted with respect to bit IRq in the
register Status1Reg. Set to logic 0, the signal on pin IRQ is equal to bit IRq.
In combination with bit IRqPushPull in register DivIEnReg, the default value
of 1 ensures, that the output level on pin IRQ is 3-state.
Allows the transmitter interrupt request (indicated by bit TxIRq) to be
propagated to pin IRQ.
propagated to pin IRQ.
Allows the idle interrupt request (indicated by bit IdleIRq) to be propagated to
pin IRQ.
Allows the high alert interrupt request (indicated by bit HiAlertIRq) to be
propagated to pin IRQ.
propagated to pin IRQ.
Allows the error interrupt request (indicated by bit ErrIRq) to be propagated
to pin IRQ.
propagated to pin IRQ.
TxIEn
r/w
Rev. 3.6 — 10 March 2011
6
RxIEn
111336
r/w
5
IdleIEn
r/w
4
HiAlertIEn LoAlertIEn
r/w
3
r/w
2
Transmission module
© NXP B.V. 2011. All rights reserved.
ErrIEn
r/w
1
PN512
TimerIEn
21 of 125
r/w
0