PN5120A0HN/C1 NXP Semiconductors, PN5120A0HN/C1 Datasheet - Page 96
PN5120A0HN/C1
Manufacturer Part Number
PN5120A0HN/C1
Description
Transmission Module 40-Pin HVQFN EP T/R
Manufacturer
NXP Semiconductors
Datasheet
1.PN5120A0HN1C2118.pdf
(125 pages)
Specifications of PN5120A0HN/C1
Package
40HVQFN EP
Operating Temperature
-30 to 85 °C
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19. PN512 command set
PN512
Product data sheet
COMPANY PUBLIC
19.1 General description
19.2 General behavior
The PN512 operation is determined by a state machine capable of performing a set of
commands. A command is executed by writing a command code (see
CommandReg register.
Arguments and/or data necessary to process a command are exchanged via the FIFO
buffer.
The PN512 operation is determined by a state machine capable of performing a set of
commands. A command is executed by writing a command code (see
CommandReg register.
Arguments and/or data necessary to process a command are exchanged via the FIFO
buffer.
Fig 35. Oscillator start-up time
•
•
•
•
Each command that needs a data bit stream (or data byte stream) as an input
immediately processes any data in the FIFO buffer. An exception to this rule is the
Transceive command. Using this command, transmission is started with the
BitFramingReg register’s StartSend bit.
Each command that needs a certain number of arguments, starts processing only
when it has received the correct number of arguments from the FIFO buffer.
The FIFO buffer is not automatically cleared when commands start. This makes it
possible to write command arguments and/or the data bytes to the FIFO buffer and
then start the command.
Each command can be interrupted by the host writing a new command code to the
CommandReg register, for example, the Idle command.
device activation
clock stable
clock ready
oscillator
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
111336
t
startup
t
osc
Transmission module
Table
Table
© NXP B.V. 2011. All rights reserved.
t
d
PN512
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