MT90820AP1 Zarlink, MT90820AP1 Datasheet - Page 14

• Manufacturer Part Number: MT90820AP1
• Description: PB FREE LARGE DIGITAL SWITCH
• Manufacturer: Zarlink

15-10
3 - 0
9-5
Bit
Bit
4
15
15
0
0
Read/Write Address:
Reset Value:
Read/Write Address:
Reset Value:
14
BPD4-0
STA3-0
14
Unused
0
Name
0
Name
BPE
13
13
0
0
Input/Output
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
Data Rate
12
12
Stream Address Bits. The binary value expressed by these bits refers to the input or output
data stream, which corresponds to the subsection of memory made accessible for subsequent
operations. (STA3 = MSB, STA0 = LSB)
Must be zero for normal operation.
Block Programming Data. These bits carry the value to be loaded into the connection
memory block whenever the memory block programming feature is activated. After the MBP
bit in the control register is set to 1 and the BPE bit is set to 1, the contents of the bits BPD4- 0
are loaded into bit 15 to bit 11 of the connection memory. Bit 10 to bit 0 of the connection
memory are set to 0.
Begin Block programming Enable. A zero to one transition of this bit enables the memory
block programming function. The BPE and BPD4-0 bits in the IMS register have to be defined
in the same write operation. Once the BPE bit is set high, the device requires two frames to
complete the block programming. After the programming function has finished, the BPE bit
returns to zero to indicate the operation is completed. When the BPE = 1, the BPE or MBP can
be set to 0 to abort the programming operation.
When BPE = 1, the other bits in the IMS register must not be changed for two frames to ensure
proper operation.
0
0
Table 7 - Valid Address Lines for Different Bit Rates
11
11
0
0
00
0000
01
0000
Table 6 - Control (CR) Register Bits
H
H
,
10
10
,
H
0
H
0
.
.
BPD
4
Zarlink Semiconductor Inc.
9
9
0
MT90820
BPD
8
8
3
0
14
BPD
7
7
0
2
Description
Description
BPD
6
6
1
0
MBP
BPD
5
5
0
A6, A5, A4 A3, A2, A1, A0
A5, A4, A3, A2, A1, A0
Valid Address Lines
A4, A3, A2, A1, A0
BPE
MS
4
4
STA3
OSB
3
3
STA2
SFE
2
2
STA1
DR1
1
1
Data Sheet
STA0
DR0
0
0