AD5382BST-3 Analog Devices Inc, AD5382BST-3 Datasheet - Page 16
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AD5382BST-3
Manufacturer Part Number
AD5382BST-3
Description
IC DAC 14BIT 32CH 3V 100-LQFP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5382BSTZ-5.pdf
(40 pages)
Specifications of AD5382BST-3
Design Resources
32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) AD5382 Channel Monitor Function (CN0012)
Settling Time
8µs
Number Of Bits
14
Data Interface
Serial, Parallel
Number Of Converters
32
Voltage Supply Source
Single Supply
Power Dissipation (max)
65mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
For Use With
EVAL-AD5382EB - BOARD EVAL FOR AD5382
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD5382
Mnemonic
PD
FIFO EN
DB11/(SPI/I
DB12/(SCLK/SCL)
DB13/(DIN/SDA)
NC
2
C)
Function
Power Down (Level Sensitive, Active High). PD is used to place the device in to low power mode where the device
consumes 2 μA AIDD and 20 μA DIDD. In power-down mode, all internal analog circuitry is placed in low power
mode, and the analog output is configured as a high impedance output or provides a 100 kΩ load to ground,
depending on how the power-down mode is configured. The serial interface remains active during power-down.
FIFO Enable (Level Sensitive, Active High). When connected to DVDD, the internal FIFO is enabled, allowing the user
to write to the device at full speed. FIFO is available only in parallel interface mode. The status of the FIFO EN pin is
sampled on power-up, and also following a CLEAR or RESET, to determine if the FIFO is enabled. In either serial or I
interface modes, the FIFO EN pin should be tied low.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB11 of the parallel input data-word. In serial
interface mode, this pin acts as serial interface mode select. When serial interface mode is selected (SER/PAR = 1) and
this input is low, SPI mode is selected. In SPI mode, DB12 is the serial clock (SCLK) input and DB13 is the serial data
(DIN) input.
When serial interface mode is selected (SER/PAR = 1) and this input is high, I
is the serial clock (SCL) input and DB13 is the serial data (SDA) input.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB12 of the parallel input data-word. In serial
interface mode, this pin acts as a serial clock input.
Serial Interface Mode. In serial interface mode, data is clocked into the shift register on the falling edge of SCLK. This
operates at clock speeds up to 50 MHz.
I
mode is compatible with both 100 kHz and 400 kHz operating modes.
Multifunction Data Input Pin. In parallel interface mode, this pin acts as DB13 of the parallel input data-word.
Serial Interface Mode. In serial interface mode, this pin acts as the serial data input. Data must be valid on the falling
edge of SCLK.
I
No Connect. The user is advised not to connect any signals to these pins.
2
2
C Mode. In I
C Mode. In I
2
2
C mode, this pin performs the SCL function, clocking data into the device. The data transfer rate in I
C mode, this pin is the serial data pin (SDA) operating as an open-drain input/output.
Rev. B | Page 16 of 40
2
C mode is selected. In this mode, DB12
2
C
2
C