DSPB56371AF150 Freescale Semiconductor, DSPB56371AF150 Datasheet - Page 33

• Manufacturer Part Number: DSPB56371AF150
• Description: IC DSP 24BIT 150MHZ 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56371AF150

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (384 kB)
• On-chip Ram: 264kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 115°C
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 150 MIPs
• Maximum Clock Frequency: 150 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 264 KB
• Operating Supply Voltage: 1.25 V, 3.3 V
• Maximum Operating Temperature: + 115 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.13 JTAG/OnCE Interface
4
Freescale Semiconductor
Signal
This device contains circuitry protecting against damage due to high static voltage or
electrical fields. However, normal precautions should be taken to avoid exceeding
maximum voltage ratings. Reliability of operation is enhanced if unused inputs are pulled
to an appropriate logic voltage level (for example, either GND or V
value for a pull-up or pull-down resistor is 4.7 kΩ.
In the calculation of timing requirements, adding a maximum value of one specification to
a minimum value of another specification does not yield a reasonable sum. A maximum
specification is calculated using a worst case variation of process parameter values in one
direction. The minimum specification is calculated using the worst case for the same
parameters in the opposite direction. Therefore, a “maximum” value for a specification will
never occur in the same device that has a “minimum” value for another specification;
adding a maximum to a minimum represents a condition that can never exist.
Name
TDO
TMS
TCK
TDI
Maximum Ratings
Signal
Output
Type
Input
Input
Input
Tri-state
during
Reset
State
Input
Input
Input
Test Clock—TCK is a test clock input signal used to synchronize the JTAG
test logic. It has an internal pull-up resistor.
Internal Pull up resistor.
This input is 5 V tolerant.
Test Data Input—TDI is a test data serial input signal used for test instructions
and data. TDI is sampled on the rising edge of TCK and has an internal pull-up
resistor.
Internal Pull up resistor.
This input is 5 V tolerant.
Test Data Output—TDO is a test data serial output signal used for test
instructions and data. TDO is tri-statable and is actively driven in the shift-IR
and shift-DR controller states. TDO changes on the falling edge of TCK.
Test Mode Select—TMS is an input signal used to sequence the test
controller’s state machine. TMS is sampled on the rising edge of TCK and has
an internal pull-up resistor.
Internal Pull up resistor.
This input is 5 V tolerant.
Table 13. JTAG/OnCE Interface
DSP56371 Data Sheet, Rev. 4.1
CAUTION
NOTE
Signal Description
DD
). The suggested
Maximum Ratings
33