AD14060BF-4 Analog Devices Inc, AD14060BF-4 Datasheet - Page 5

• Manufacturer Part Number: AD14060BF-4
• Description: IC DSP CMOS 32BIT 308CQFP
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of AD14060BF-4

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 40MHz
• Non-volatile Memory: External
• On-chip Ram: 2MB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 308-CQFP
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Clock Freq (max): 40MHz
• Mips: 40
• Device Input Clock Speed: 40MHz
• Ram Size: 1.9073535156MB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 308
• Package Type: CQFP
• Lead Free Status / Rohs Status: Not Compliant

TIMING SPECIFICATIONS
This data sheet represents production-released specifications
for the AD14060 (5 V), and for the AD14060L (3.3 V). The
ADSP-21060 die components are 100% tested, and the
assembled AD14060/AD14060L units are again extensively
tested at speed and across temperature. Parametric limits were
established from the ADSP-21060 characterization followed by
further design and analysis of the AD14060/AD14060L package
characteristics.
The specifications are based on a CLKIN frequency of 40 MHz
(t
CLKIN frequencies (within the minimum to maximum range
of the t
between the actual CLKIN period and a CLKIN period of 25 ns:
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results
for an individual device, the values given in this data sheet
Table 3. Clock Input
Parameter
Clock Input
Timing Requirements:
t
t
t
t
CK
CKL
CKH
CKRF
CK
= 25 ns). The DT derating allows specifications at other
DT = t
CK
specification; see Table 3). DT is the difference
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKIN Rise/Fall (0.4 V to 2.0 V)
CK
− 25 ns
CLKIN
t
Figure 2. Clock Input
CKH
Rev. B | Page 5 of 48
Min
25
7
5
t
CK
40 MHz (5 V)
reflect statistical variations and worst cases. Consequently, one
cannot meaningfully add parameters to derive longer times.
Switching Characteristics specify how the processor changes its
signals. The user has no control over this timing—circuitry
external to the processor must be designed for compatibility
with these signal characteristics. Switching characteristics
specify what the processor does in a given circumstance. The
user can also use switching characteristics to ensure that any
timing requirement of a device connected to the processor
(such as memory) is satisfied.
Timing Requirements apply to signals that are controlled by
circuitry external to the processor, such as the data input for a
read operation. Timing requirements guarantee that the
processor operates correctly with other devices.
(O/D) = Open Drain
(A/D) = Active Drive
t
CKL
Max
100
3
Min
25
9.5
5
40 MHz (3.3 V)
AD14060/AD14060L
100
3
Max
Unit
ns
ns
ns
ns