ADSP-2196MBST-140 Analog Devices Inc, ADSP-2196MBST-140 Datasheet - Page 3

IC DSP CONTROLLER 16BIT 144LQFP

ADSP-2196MBST-140

Manufacturer Part Number
ADSP-2196MBST-140
Description
IC DSP CONTROLLER 16BIT 144LQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2196MBST-140

Rohs Status
RoHS non-compliant
Interface
Host Interface, SPI, SSP, UART
Clock Rate
140MHz
Non-volatile Memory
ROM (48 kB)
On-chip Ram
40kB
Voltage - I/o
3.30V
Voltage - Core
2.50V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
16b
Format
Fixed Point
Clock Freq (max)
140MHz
Mips
140
Device Input Clock Speed
140MHz
Ram Size
40KB
Program Memory Size
48KB
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (min)
2.37V
Operating Supply Voltage (max)
2.63/3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2196MBST-140
Manufacturer:
ON
Quantity:
12 000
ADSP-219x dSP Core Features . . . . . . . . . . . . . . . . . . . 1
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . 1
ADSP-2196 DSP Features . . . . . . . . . . . . . . . . . . . . . 2
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
REV. PrA
September 2001
General Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
DSP Core Architecture . . . . . . . . . . . . . . . . . . . . 4
DSP Peripherals Architecture . . . . . . . . . . . . . . . 5
Memory Architecture . . . . . . . . . . . . . . . . . . . . . 6
Internal (On-Chip) Memory . . . . . . . . . . . . . . . . 6
Internal On-Chip ROM . . . . . . . . . . . . . . . . . . . . 6
On-Chip Memory Security . . . . . . . . . . . . . . . . . 7
External (Off-Chip) Memory . . . . . . . . . . . . . . . . 7
External Memory Space . . . . . . . . . . . . . . . . . . . . 7
I/O Memory Space . . . . . . . . . . . . . . . . . . . . . . . 7
Boot Memory Space . . . . . . . . . . . . . . . . . . . . . . 7
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . 10
Host Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Host Port Acknowledge (HACK) Modes . . . . . . 10
Host Port Chip Selects . . . . . . . . . . . . . . . . . . . 11
DSP Serial Ports (SPORTs) . . . . . . . . . . . . . . . 11
Serial Peripheral Interface (SPI) Ports . . . . . . . . 12
UART Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Programmable Flag (PFx) Pins . . . . . . . . . . . . . 13
Low Power Operation . . . . . . . . . . . . . . . . . . . . 13
Idle Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Power-down Core Mode . . . . . . . . . . . . . . . . . . 13
Power-Down Core/Peripherals Mode . . . . . . . . . 13
Power-Down All Mode . . . . . . . . . . . . . . . . . . . 14
Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . 15
Booting Modes . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bus Request and Bus Grant . . . . . . . . . . . . . . . . 16
Instruction Set Description . . . . . . . . . . . . . . . . 16
Development Tools . . . . . . . . . . . . . . . . . . . . . . 16
Designing an Emulator-Compatible DSP Board
Target Board Header . . . . . . . . . . . . . . . . . . . . . 17
JTAG Emulator Pod Connector . . . . . . . . . . . . 18
Design-for-Emulation Circuit Information . . . . . 18
Additional Information . . . . . . . . . . . . . . . . . . . 18
(Target) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
For current information contact Analog Devices at 800/262-5643
TABLE OF CONTENTS
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Recommended Operating Conditions
Electrical Characteristics
Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . 24
144-Lead Metric Thin Plastic Quad Flatpack
144-Ball Mini-BGA (CA-144) . . . . . . . . . . . . . . . . . 67
ABSOLUTE MAXIMUM RATINGS . . . . . . . 24
ESD SENSITIVITY . . . . . . . . . . . . . . . . . . . . . 24
Clock In and Clock Out Cycle Timing . . . . . . . 25
Programmable Flags Cycle Timing . . . . . . . . . . 26
Timer PWM_OUT Cycle Timing . . . . . . . . . . . 27
External Port Write Cycle Timing . . . . . . . . . . . 28
External Port Read Cycle Timing . . . . . . . . . . . 30
External Port Bus Request and Grant Cycle
Host Port ALE Mode Write Cycle Timing . . . . 34
Host Port ACC Mode Write Cycle Timing . . . . 36
Host Port ALE Mode Read Cycle Timing . . . . . 38
Host Port ACC Mode Read Cycle Timing . . . . 40
Serial Port (SPORT) Clocks and Data Timing . 42
Serial Port (SPORT) Frame Synch Timing . . . . 44
Serial Peripheral Interface (SPI) Port—Master
Serial Peripheral Interface (SPI) Port—Slave
Universal Asynchronous Receiver-Transmitter
JTAG Test And Emulation Port Timing . . . . . . 51
Output Drive Currents . . . . . . . . . . . . . . . . . . . 52
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . 52
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . 54
Output Disable Time . . . . . . . . . . . . . . . . . . . . 54
Output Enable Time . . . . . . . . . . . . . . . . . . . . . 54
Example System Hold Time Calculation . . . . . . 55
Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . 55
Environmental Conditions . . . . . . . . . . . . . . . . 55
Thermal Characteristics . . . . . . . . . . . . . . . . . . 55
ADSP-2196 144-Lead LQFP Pinout . . . . . . . . . 58
ADSP-2196 144-Lead Mini-BGA Pinout . . . . . 62
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
(UART) Port—Receive and Transmit
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
(LQFP) (ST-144) . . . . . . . . . . . . . . . . . . . 67
. . . . . . . . . . . . . . . . . . . . 22
ADSP-2196
. . . . . . . . . . 22
3

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