EP2C5F256C6N Altera, EP2C5F256C6N Datasheet - Page 44
![IC CYCLONE II FPGA 5K 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP2C5F256C6N
Manufacturer Part Number
EP2C5F256C6N
Description
IC CYCLONE II FPGA 5K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C5F256C6N
Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
158
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
158
Frequency (max)
500MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2131
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C5F256C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Embedded Multipliers
Figure 2–17. M4K RAM Block LAB Row Interface
Embedded
Multipliers
2–32
Cyclone II Device Handbook, Volume 1
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
C4 Interconnects
f
M4K RAM Block Local
Interconnect Region
16
16
For more information on Cyclone II embedded memory, see the
Cyclone II Memory Blocks chapter in Volume 1 of the Cyclone II Device
Handbook.
Cyclone II devices have embedded multiplier blocks optimized for
multiplier-intensive digital signal processing (DSP) functions, such as
finite impulse response (FIR) filters, fast Fourier transform (FFT)
functions, and discrete cosine transform (DCT) functions. You can use the
embedded multiplier in one of two basic operational modes, depending
on the application needs:
■
■
One 18-bit multiplier
Up to two independent 9-bit multipliers
Byte enable
Clocks
address
LAB Row Clocks
M4K RAM
Block
datain
dataout
Signals
Control
6
16
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
R4 Interconnects
Altera Corporation
February 2007