EP2C5F256C6N Altera, EP2C5F256C6N Datasheet - Page 77

IC CYCLONE II FPGA 5K 256-FBGA

EP2C5F256C6N

Manufacturer Part Number
EP2C5F256C6N
Description
IC CYCLONE II FPGA 5K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C5F256C6N

Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
158
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
158
Frequency (max)
500MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2131

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C5F256C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2C5F256C6N
Manufacturer:
ALTERA
0
Part Number:
EP2C5F256C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2C5F256C6N
0
Altera Corporation
February 2007
Note to
(1)
CONFIG_IO
SignalTap II
instructions
Table 3–1. Cyclone II JTAG Instructions (Part 2 of 2)
JTAG Instruction
Bus hold and weak pull-up resistor features override the high-impedance state of HIGHZ, CLAMP, and EXTEST.
Table
3–1:
00 0000 1101
Instruction Code
The Quartus II software has an Auto Usercode feature where you can
choose to use the checksum value of a programming file as the JTAG user
code. If selected, the checksum is automatically loaded to the USERCODE
register. In the Settings dialog box in the Assignments menu, click Device
& Pin Options, then General, and then turn on the Auto Usercode
option.
Allows configuration of I/O standards through the JTAG chain for
JTAG testing. Can be executed before, after, or during
configuration. Stops configuration if executed during configuration.
Once issued, the
reset the configuration device.
device is reconfigured.
Monitors internal device operation with the SignalTap II embedded
logic analyzer.
CONFIG_IO
Cyclone II Device Handbook, Volume 1
Description
nSTATUS
instruction holds
Configuration & Testing
is held low until the
nSTATUS
low to
3–3

Related parts for EP2C5F256C6N