EP2C50F672I8N Altera, EP2C50F672I8N Datasheet - Page 29

• Manufacturer Part Number: EP2C50F672I8N
• Description: IC CYCLONE II FPGA 50K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C50F672I8N

• Number Of Logic Elements/cells: 50528
• Number Of Labs/clbs: 3158
• Total Ram Bits: 594432
• Number Of I /o: 450
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 50528
• # I/os (max): 450
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 50528
• Ram Bits: 594432
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2127

Altera Corporation
February 2007
Each global clock network has a clock control block to select from a
number of input clock sources (PLL clock outputs, CLK[] pins, DPCLK[]
pins, and internal logic) to drive onto the global clock network.
lists how many PLLs, CLK[] pins, DPCLK[] pins, and global clock
networks are available in each Cyclone II device. CLK[] pins are
dedicated clock pins and DPCLK[] pins are dual-purpose clock pins.
Figures 2–11
inputs, DPCLK[] pins, and clock control blocks.
EP2C5
EP2C8
EP2C15
EP2C20
EP2C35
EP2C50
EP2C70
Table 2–2. Cyclone II Device Clock Resources
Device
and
Number of
2–12
PLLs
2
2
4
4
4
4
4
show the location of the Cyclone II PLLs, CLK[]
Number of
CLK Pins
Cyclone II Device Handbook, Volume 1
16
16
16
16
16
8
8
DPCLK Pins
Number of
20
20
20
20
20
Cyclone II Architecture
8
8
Global Clock
Number of
Networks
Table 2–2
16
16
16
16
16
8
8
2–17