EP2C50F672I8N Altera, EP2C50F672I8N Datasheet - Page 77

IC CYCLONE II FPGA 50K 672-FBGA

EP2C50F672I8N

Manufacturer Part Number
EP2C50F672I8N
Description
IC CYCLONE II FPGA 50K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C50F672I8N

Number Of Logic Elements/cells
50528
Number Of Labs/clbs
3158
Total Ram Bits
594432
Number Of I /o
450
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
50528
# I/os (max)
450
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
50528
Ram Bits
594432
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2127

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Altera Corporation
February 2007
Note to
(1)
CONFIG_IO
SignalTap II
instructions
Table 3–1. Cyclone II JTAG Instructions (Part 2 of 2)
JTAG Instruction
Bus hold and weak pull-up resistor features override the high-impedance state of HIGHZ, CLAMP, and EXTEST.
Table
3–1:
00 0000 1101
Instruction Code
The Quartus II software has an Auto Usercode feature where you can
choose to use the checksum value of a programming file as the JTAG user
code. If selected, the checksum is automatically loaded to the USERCODE
register. In the Settings dialog box in the Assignments menu, click Device
& Pin Options, then General, and then turn on the Auto Usercode
option.
Allows configuration of I/O standards through the JTAG chain for
JTAG testing. Can be executed before, after, or during
configuration. Stops configuration if executed during configuration.
Once issued, the
reset the configuration device.
device is reconfigured.
Monitors internal device operation with the SignalTap II embedded
logic analyzer.
CONFIG_IO
Cyclone II Device Handbook, Volume 1
Description
nSTATUS
instruction holds
Configuration & Testing
is held low until the
nSTATUS
low to
3–3

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