EP3C120F780C8 Altera, EP3C120F780C8 Datasheet - Page 71

• Manufacturer Part Number: EP3C120F780C8
• Description: IC CYCLONE III FPGA 119K 780FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C120F780C8

• Number Of Logic Elements/cells: 119088
• Number Of Labs/clbs: 7443
• Total Ram Bits: 3981312
• Number Of I /o: 531
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-2391; 544-2531; 544-2531; EP3C120F780C8ES

Chapter 2: Cyclone III LS Device Data Sheet
Glossary
Table 2–39. Glossary (Part 2 of 5)
© December 2009
Letter
Q
R
P
PLL Block
R
Receiver Input
Waveform
RSKM (Receiver
input skew
margin)
L
Term
—
Altera Corporation
The following block diagram highlights the PLL specification parameters.
Receiver differential input discrete resistor (external to the Cyclone III LS device)
Receiver Input Waveform for LVDS and LVPECL Differential Standards
High-speed I/O Block: The total margin left after accounting for the sampling window and
TCCS. RSKM = (TUI – SW – TCCS) / 2
Core Clock
Key
Single-Ended Waveform
Differential Input Waveform
CLK
Reconfigurable in User Mode
V
CM
Switchover
V
f
ID
IN
N
f
INPFD
V
ID
Definitions
PFD
—
M
CP
Phase tap
LF
VCO
Cyclone III Device Handbook, Volume 2
f
VCO
V
p - n
Positive Channel (p) = V
Negative Channel (n) = V
Ground
ID
0 V
Counters
C0..C4
CLKOUT Pins
f
f
OUT _EXT
OUT
GCLK
IH
IL
2–27