EP2S60F484C5 Altera, EP2S60F484C5 Datasheet - Page 131

IC STRATIX II FPGA 60K 484-FBGA

EP2S60F484C5

Manufacturer Part Number
EP2S60F484C5
Description
IC STRATIX II FPGA 60K 484-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S60F484C5

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
334
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
For Use With
544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1134
EP2S60F484C5ES

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0
Stratix II
Hot-Socketing
Specifications
Altera Corporation
May 2007
SII51004-3.2
Stratix
or hot swap, and power sequencing support without the use of any
external devices. You can insert or remove a Stratix II board in a system
during system operation without causing undesirable effects to the
running system bus or the board that was inserted into the system.
The hot socketing feature also removes some of the difficulty when you
use Stratix II devices on printed circuit boards (PCBs) that also contain a
mixture of 5.0-, 3.3-, 2.5-, 1.8-, 1.5- and 1.2-V devices. With the Stratix II hot
socketing feature, you no longer need to ensure a proper power-up
sequence for each device on the board.
The Stratix II hot socketing feature provides:
This chapter also discusses the power-on reset (POR) circuitry in Stratix II
devices. The POR circuitry keeps the devices in the reset state until the
V
Stratix II devices offer hot socketing capability with all three features
listed above without any external components or special design
requirements. The hot socketing feature in Stratix II devices allows:
CC
Board or device insertion and removal without external components
or board manipulation
Support for any power-up sequence
Non-intrusive I/O buffers to system buses during hot insertion
is within operating range.
The device can be driven before power-up without any damage to
the device itself.
I/O pins remain tri-stated during power-up. The device does not
drive out before or during power-up, thereby affecting other buses in
operation.
Signal pins do not drive the V
External input signals to I/O pins of the device do not internally
power the V
paths within the device.
®
II devices offer hot socketing, which is also known as hot plug-in
CCIO
or V
CCINT
power supplies of the device via internal
CCIO
4. Hot Socketing &
, V
CCPD
Power-On Reset
, or V
CCINT
power supplies.
4–1

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