EP2SGX60EF1152I4 Altera, EP2SGX60EF1152I4 Datasheet - Page 226

• Manufacturer Part Number: EP2SGX60EF1152I4
• Description: IC STRATIX II GX 60K 1152-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX60EF1152I4

• Number Of Logic Elements/cells: 60440
• Number Of Labs/clbs: 3022
• Total Ram Bits: 2544192
• Number Of I /o: 534
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1152-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 60440
• # I/os (max): 534
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 60440
• Ram Bits: 2544192
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-2186

Operating Conditions
4–56
Stratix II GX Device Handbook, Volume 1
Low
sustaining
current
High
sustaining
current
Low
overdrive
current
High
overdrive
current
Bus-hold
trip point
25-Ω R
3.3/2.5
50-Ω R
3.3/2.5
Parameter
Table 4–48. Bus Hold Parameters
Table 4–49. On-Chip Termination Specification for Top and Bottom I/O Banks (Part 1 of 2)
Symbol
S
S
Internal series termination with
calibration (25-Ω setting)
Internal series termination without
calibration (25-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
V
(maximum)
V
(minimum)
0 V < V
V
0 V < V
V
Conditions
IN
IN
CCIO
CCIO
> V
< V
IL
IH
IN
IN
Description
<
<
–22.5
Bus Hold Specifications
Table 4–48
On-Chip Termination Specifications
Tables 4–49
resistance tolerance when using series or differential on-chip termination.
22.5
0.45
Min
1.2 V
–120
Max
0.95
120
shows the Stratix II GX device family bus hold specifications.
and
Min
–25
0.5
25
V
V
V
V
4–50
1.5 V
CCIO
CCIO
CCIO
CCIO
–160
Max
160
1.0
Conditions
define the specification for internal termination
= 3.3/2.5 V
= 3.3/2.5 V
= 3.3/2.5 V
= 3.3/2.5 V
0.68
Min
–30
V
30
CCIO
1.8 V
Level
–200
Max
1.07
200
Commercial
Max
Min
–50
±30
±30
0.7
±5
±5
50
2.5 V
Resistance Tolerance
–300
Max
300
1.7
Industrial
Altera Corporation
Max
± 30
Min
–70
±10
±30
0.8
±10
70
3.3 V
Notes
–500
Max
500
2.0
June 2009
(1),
Unit
%
%
%
%
Unit
μA
μA
μA
μA
(2)
V