EP1C20F400I7 Altera, EP1C20F400I7 Datasheet - Page 23

IC CYCLONE FPGA 20K LE 400-FBGA

EP1C20F400I7

Manufacturer Part Number
EP1C20F400I7
Description
IC CYCLONE FPGA 20K LE 400-FBGA
Manufacturer
Altera
Series
Cyclone®r
Datasheet

Specifications of EP1C20F400I7

Number Of Logic Elements/cells
20060
Number Of Labs/clbs
2006
Total Ram Bits
294912
Number Of I /o
301
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
400-FBGA
Family Name
Cyclone®
Number Of Logic Blocks/elements
20060
# I/os (max)
301
Frequency (max)
320.1MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
20060
Ram Bits
294912
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
400
Package Type
FBGA
No. Of Logic Blocks
2006
No. Of Macrocells
20060
Family Type
Cyclone
No. Of Speed Grades
7
No. Of I/o's
301
Clock Management
PLL
I/o Supply Voltage
4.1V
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1049

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Altera Corporation
May 2008
LUT Chain
Register Chain
Local Interconnect
Direct Link
Interconnect
R4 Interconnect
C4 Interconnect
LE
M4K RAM Block
PLL
Column IOE
Row IOE
Table 2–2. Cyclone Device Routing Scheme
Source
v
All embedded blocks communicate with the logic array similar to
LAB-to-LAB interfaces. Each block (i.e., M4K memory or PLL) connects
to row and column interconnects and has local interconnect regions
driven by row and column interconnects. These blocks also have direct
link interconnects for fast connections to and from a neighboring LAB.
Table 2–2
v
v
v
v
v
v
shows the Cyclone device's routing scheme.
v
v
v
v
v
v
v
v
v
v
Destination
v
v
v
v
v
v
v
v
v
v
v
MultiTrack Interconnect
v
v
Preliminary
v
2–17

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