EP3C40F324I7N Altera, EP3C40F324I7N Datasheet - Page 171
![IC CYCLONE III FPGA 40K 324 FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP3C40F324I7N
Manufacturer Part Number
EP3C40F324I7N
Description
IC CYCLONE III FPGA 40K 324 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C40F324I7N.pdf
(274 pages)
Specifications of EP3C40F324I7N
Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
195
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
39600
# I/os (max)
195
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
39600
Ram Bits
1161216
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2547
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C40F324I7N
Manufacturer:
ALTERA31
Quantity:
129
Part Number:
EP3C40F324I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
Table 9–7. Cyclone III Device Family Configuration Schemes
© December 2009
Fast Active Serial Standard (AS Standard
POR)
Fast Active Serial Standard (AS Standard
POR)
Fast Active Serial Fast (AS Fast POR)
Fast Active Serial Fast (AS Fast POR)
Active Parallel ×16 Standard (AP Standard
POR, for Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard
POR, for Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard
POR, for Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Passive Serial Standard (PS Standard POR)
Passive Serial Fast (PS Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
(for Cyclone III devices
Fast Passive Parallel Fast (FPP Fast POR)
(for Cyclone III LS devices only)
Fast Passive Parallel Fast (FPP Fast POR)
with Encryption (for Cyclone III LS
devices only)
Configuration Scheme
1
1
1
Altera Corporation
Smaller Cyclone III devices or package options (E144, M164, Q240, F256, and U256
packages) do not have the MSEL[3] pin. The AS Fast POR configuration scheme at
3.0- or 2.5-V configuration voltage standard and the AP configuration scheme are not
supported in Cyclone III devices without the MSEL[3] pin. To configure these devices
with other supported configuration schemes, select the MSEL[2..0] pins according
to the MSEL settings in
Hardwire the MSEL pins to V
to avoid any problems detecting an incorrect configuration scheme. Do not drive the
MSEL pins with a microprocessor or another device.
The Quartus II software prohibits you from using the LVDS I/O standard in I/O
Bank 1 when the configuration device I/O voltage is not 2.5 V. If you need to assign
LVDS I/O standard in I/O Bank 1, navigate to
Assignments>Device>Settings>Device and Pin Option>Configuration to change the
Configuration Device I/O voltage to 2.5 V or Auto.
only)(4)
(4)
3
0
0
1
0
0
1
1
0
0
0
1
1
1
0
0
Table
9–7.
CCA
2
0
0
1
1
1
0
0
1
1
0
1
1
1
0
1
or GND without any pull-up or pull-down resistors
MSEL
(Note 1)
0
1
1
1
0
1
1
0
0
1
0
0
1
1
0
0
(Part 1 of 2)
0
0
1
1
0
1
1
0
1
0
0
0
0
1
1
1
Configuration Voltage Standard (V)
Cyclone III Device Handbook, Volume 1
3.3/3.0/2.5
3.3/3.0/2.5
3.3/3.0/2.5
3.3/3.0/2.5
3.0/2.5
(2),(3)
3.0/2.5
3.0/2.5
1.8/1.5
1.8/1.5
3.3
3.3
3.3
1.8
3.3
1.8
9–11