EP20K100EFI324-2X Altera, EP20K100EFI324-2X Datasheet - Page 21
![IC APEX 20KE FPGA 100K 324-FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP20K100EFI324-2X
Manufacturer Part Number
EP20K100EFI324-2X
Description
IC APEX 20KE FPGA 100K 324-FBGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K100EFI324-2X
Number Of Logic Elements/cells
4160
Number Of Labs/clbs
416
Total Ram Bits
53248
Number Of I /o
246
Number Of Gates
263000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
APEX 20K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4160
# Registers
26
# I/os (max)
246
Frequency (max)
250MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
4160
Ram Bits
53248
Device System Gates
263000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2091
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Altera Corporation
Figure 9. APEX 20K Interconnect Structure
Column
Interconnect
I/O
I/O
I/O
Row
Interconnect
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
A row line can be driven directly by LEs, IOEs, or ESBs in that row.
Further, a column line can drive a row line, allowing an LE, IOE, or ESB to
drive elements in a different row via the column and row interconnect.
The row interconnect drives the MegaLAB interconnect to drive LEs,
IOEs, or ESBs in a particular MegaLAB structure.
A column line can be directly driven by LEs, IOEs, or ESBs in that column.
A column line on a device’s left or right edge can also be driven by row
IOEs. The column line is used to route signals from one row to another. A
column line can drive a row line; it can also drive the MegaLAB
interconnect directly, allowing faster connections between rows.
Figure 10
interconnect to drive LEs within MegaLAB structures.
MegaLAB
MegaLAB
MegaLAB
shows how the FastTrack Interconnect uses the local
I/O
I/O
APEX 20K Programmable Logic Device Family Data Sheet
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
I/O
I/O
I/O
Column
Interconnect
21