EP20K100EFI324-2X Altera, EP20K100EFI324-2X Datasheet - Page 68
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EP20K100EFI324-2X
Manufacturer Part Number
EP20K100EFI324-2X
Description
IC APEX 20KE FPGA 100K 324-FBGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K100EFI324-2X
Number Of Logic Elements/cells
4160
Number Of Labs/clbs
416
Total Ram Bits
53248
Number Of I /o
246
Number Of Gates
263000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
324-FBGA
Family Name
APEX 20K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4160
# Registers
26
# I/os (max)
246
Frequency (max)
250MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
4160
Ram Bits
53248
Device System Gates
263000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2091
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APEX 20K Programmable Logic Device Family Data Sheet
68
All specifications are always representative of worst-case supply voltage
and junction temperature conditions. All output-pin-timing specifications
are reported for maximum driver strength.
Figure 36
Figure 36. APEX 20K f
Figure 37
parameters can be used to estimate f
Quartus II software timing analysis should be used for more accurate
timing information.
shows the f
shows the f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ESBRC
ESBWC
ESBDATASU
ESBADDRSU
ESBDD
PD
PTERMCO
ESBWESU
ESBDATACO1
ESBDATACO2
PTERMSU
SU
H
CO
LUT
LE
MAX
ESB
MAX
MAX
Timing Model
timing model for APEX 20K devices.
timing model for APEX 20KE devices. These
MAX
for multiple levels of logic.
Routing Delay
t
t
t
F20+
F1—4
F5—20
Altera Corporation