XC3SD1800A-4CSG484C Xilinx Inc, XC3SD1800A-4CSG484C Datasheet - Page 80
![SPARTAN-3ADSP FPGA 1800K 484CSA](/photos/6/73/67348/pk223-cs484_sml.jpg)
XC3SD1800A-4CSG484C
Manufacturer Part Number
XC3SD1800A-4CSG484C
Description
SPARTAN-3ADSP FPGA 1800K 484CSA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3SD3400A-4FGG676C.pdf
(4 pages)
3.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD1800A-4CSG484C
Total Ram Bits
1548288
Number Of Logic Elements/cells
37440
Number Of Labs/clbs
4160
Number Of I /o
309
Number Of Gates
1800000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA, CSPBGA
No. Of Logic Blocks
37440
No. Of Gates
1800000
No. Of Macrocells
37440
Family Type
Spartan-3A
No. Of Speed Grades
4
No. Of I/o's
309
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1537
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3SD1800A-4CSG484C
Manufacturer:
XilinxInc
Quantity:
3 000
Part Number:
XC3SD1800A-4CSG484C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
DS610 (v3.0) October 4, 2010
Product Specification
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
IO_L41N_2
IO_L45N_2
IO_2
IP_2/VREF_2
IO_L14N_2
IO_L15P_2
IO_L21P_2
IP_2
IO_L30N_2/MOSI/CSI_B
IO_L38N_2
IO_L47P_2
IO_L02N_2/CSO_B
IP_2/VREF_2
IO_L12N_2
IO_L17N_2/VS2
IO_L25P_2/GCLK12
IO_L27N_2/GCLK1
IO_L34P_2/INIT_B
IO_L43P_2
IO_L47N_2
IP_2/VREF_2
IP_2
IP_2
IP_2
IP_2
IP_2
IP_2/VREF_2
IP_2
IP_2
IP_2
IP_2
IP_2
IP_2
IP_2
IP_2/VREF_2
IP_2
IP_2
VCCO_2
VCCO_2
XC3SD1800A Pin Name
FG676
AC20
AC21
AC22
AB12
AB13
AB15
AB16
AB18
AA10
AA12
AA13
AA14
AA15
AA17
AA18
AA20
AD23
AC18
AB10
AB20
AA19
AB17
W18
W11
W16
Ball
AB6
AB7
AB9
AA7
AA9
AD5
AC5
AC7
AA8
AF2
Y11
Y18
Y19
Y8
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VREF
DUAL
DUAL
VREF
DUAL
GCLK
GCLK
DUAL
VREF
VREF
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
Bank
Spartan-3A DSP FPGA Family: Pinout Descriptions
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
VCCO_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
IO_L53P_3
IO_L53N_3
IP_L54P_3
IO_L57P_3
IO_L57N_3
IP_L50P_3
IP_L50N_3/VREF_3
IO_L52P_3
IO_L52N_3
IO_L63N_3
IO_L63P_3
IO_L47P_3
IO_L47N_3
IP_L46N_3
IO_L49N_3
IO_L59N_3
IO_L59P_3
IO_L61N_3
IO_L44P_3
IO_L44N_3
IP_L46P_3
IO_L42N_3
IO_L49P_3
IO_L51N_3
IO_L56P_3
IO_L56N_3
IO_L61P_3
IO_L38P_3
IO_L38N_3
IO_L42P_3
IO_L51P_3
IO_L48N_3
XC3SD1800A Pin Name
FG676
AE11
AE16
AE22
AB14
AB19
AE5
AB8
Ball
W1
W2
W3
W4
W6
W7
Y1
Y2
Y3
Y5
Y6
V1
V2
V4
V5
V6
V7
V8
U1
U2
U3
U4
U5
U6
U7
U8
U9
T3
T4
T5
T7
T9
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
80