XCV812E-8FG900C Xilinx Inc, XCV812E-8FG900C Datasheet - Page 76

• Manufacturer Part Number: XCV812E-8FG900C
• Description: IC FPGA 1.8V C-TEMP 900-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-E EMr

Specifications of XCV812E-8FG900C

• Number Of Logic Elements/cells: 21168
• Number Of Labs/clbs: 4704
• Total Ram Bits: 1146880
• Number Of I /o: 556
• Number Of Gates: 254016
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 900-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
Virtex-E Extended Memory Data Sheet
The Virtex-E Extended Memory Data Sheet contains the following modules:
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Module 3 of 4
20
11/20/00
04/02/01
04/19/01
07/23/01
07/26/01
09/18/01
10/25/01
11/09/01
02/01/02
07/17/02
09/10/02
12/22/02
03/14/03
DS025-1, Virtex-E 1.8V Extended Memory FPGAs:
Introduction and Ordering Information (Module 1)
DS025-2, Virtex-E 1.8V Extended Memory FPGAs:
Functional Description (Module 2)
Date
Version
2.3.1
2.3.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
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Updated speed grade -8 numbers in Virtex-E Electrical Characteristics tables
(Module 3).
Updated minimums in Table 11 (Module 2), and added notes to Table 12 (Module 2).
Added to note 2 of Absolute Maximum Ratings (Module 3).
Changed all minimum hold times to –0.4 for Global Clock Set-Up and Hold for LVTTL
Standard, with DLL (Module 3).
Revised maximum T
In
and pin G16 is now labeled as VREF.
Updated values in
Converted data sheet to modularized format. See the
Sheet
Updated values in
Under
Changes made to SSTL symbol names in
Adjustments
Removed T
Reworded power supplies footnote to
Updated the speed grade designations used in data sheets, and added
shows the current speed grade designation for each device.
Updated
Updated the XCV405E device speed grade designation to Preliminary in
Updated
Updated footnotes to the
and Phase Information
Data sheet designation upgraded from Preliminary to Production.
Removed mention of MIL-M-38510/605 specification.
Added link to XAPP158 from the
Revised V
characteristics to
Switching Characteristics, Figure 1’’ on page
Added footnote regarding V
Under
"suggested" rate.
Table
section.
Absolute Maximum
Power-On Power Supply
4, FG676 Fine-Pitch BGA — XCV405E, pin B19 is no longer labeled as VREF,
Power-On Power Supply Requirements
Power-On Power Supply Requirements
IN
SOL
table.
in
Absolute Maximum Ratings
parameter and added footnote to
‘‘IOB Input Switching Characteristics’’ on page 5
Virtex-E Switching Characteristics
Virtex-E Switching Characteristics
www.xilinx.com
1-800-255-7778
DLLPW
tables.
DC Input and Output Levels
Ratings, changed (T
in -6 speed grade for DLL Timing Parameters (Module 3).
IN
•
•
PCI compliance to
Requirements, the fastest ramp rate is no longer a
DS025-3, Virtex-E 1.8V Extended Memory FPGAs:
DC and Switching Characteristics (Module 3)
DS025-4, Virtex-E 1.8V Extended Memory FPGAs:
Pinout Tables (Module 4)
Power-On Power Supply Requirements
Revision
Absolute Maximum Ratings
IOB Input Switching Characteristics Standard
Table. Added Clock CLK switching
7.
SOL
table.
table.
Absolute Maximum Ratings
Absolute Maximum Ratings
) to 220 °C .
tables.
tables.
Virtex-E Extended Memory Data
and
DS025-3 (v2.3.2) March 14, 2003
DLL Clock Tolerance, Jitter,
table.
and
‘‘IOB Output
Table
Table
section.
table.
table.
1, which
1.
R