CY7C63231A-PXC Cypress Semiconductor Corp, CY7C63231A-PXC Datasheet - Page 7

• Manufacturer Part Number: CY7C63231A-PXC
• Description: IC MCU 3K USB LS PERIPH 18-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63231A-PXC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (3 kB)
• Controller Series: CY7C632xx
• Ram Size: 96 x 8
• Interface: USB
• Number Of I /o: 10
• Voltage - Supply: 3.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Processor Series: CY7C63xx
• Core: M8B
• Data Bus Width: 16 bit
• Program Memory Size: 3 KB
• Data Ram Size: 96 B
• Interface Type: PS2, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 10
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

3.0
4.0
5.0
Document #: 38-08028 Rev. *B
D–/SDATA,
D+/SCLK
P0[7:0]
P1[1:0]
Name
XTALIN/P2.1
VREG/P2.0
Logic Block Diagram
Pin Configurations
Pin Assignments
P0.0
P0.1
P0.2
P0.3
V
V
SS
PP
CY7C63221A
16-pin PDIP
Low Voltage
W atch Dog
Brown-Out
Oscillator
3 Kbytes
1
2
3
4
5
6
7
8
Internal
EPROM
Reset
Timer
Reset
I/O
I/O
I/O
I/O
16
15
14
13
12
11
10
9
13, 14, 15, 16
P0.4
P0.5
P0.6
P0.7
D+/SCLK
V
XTALOUT/P2.2
D–/SDATA
XTALIN/P2.1
CC
1, 2, 3, 4,
XTALIN/P2.1 XTALOUT/P2.2
16-Pin
NA
11
12
FOR
FOR
Oscillator
RISC
Core
8-bit
Xtal
CY7C63221A-XC
CY7C63231A/
XTALOUT
15, 16, 17, 18
18-Pin/Pad
1, 2, 3, 4,
XTALIN/P2.1
VREG/P2.0
5,14
12
13
VREG/P2.0
18-pin SOIC/PDIP
P0.0
P0.1
P0.2
P0.3
P1.0
V
V
Controller
Regulator
SS
PP
W ake-Up
Interrupt
CY7C63231A
Timer
3.3V
(Top View)
1
2
3
4
5
6
7
8
9
USB differential data lines (D– and D+), or PS/2 clock and data
signals (SDATA and SCLK)
GPIO Port 0 capable of sinking up to 50 mA/pin, or sinking
controlled low or high programmable current. Can also source
2 mA current, provide a resistive pull-up, or serve as a high-
impedance input.
IO Port 1 capable of sinking up to 50 mA/pin, or sinking controlled
low or high programmable current. Can also source 2 mA current,
provide a resistive pull-up, or serve as a high-impedance input.
18
17
16
15
14
13
12
11
10
P0.5
XTALOUT/P2.2
P0.4
P0.6
P0.7
P1.1
D+/SCLK
D–/SDATA
V
CC
Engine
USB &
D+ D-
96 Bytes
PS/2
USB
Xcvr
RAM
P0.0-P0.7 P1.0-P1.1
Port 0
GPIO
12-bit
Timer
Description
P0.3
P1.0
Vss
CY7C63221/31A
enCoRe™ USB
CY7C63221A-XC/XWC
Port 1
GPIO
4
5
6
DIE
13
15
14
P0.7
P1.1
D+/SCLK
Page 7 of 50
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