CY7C63231A-PXC Cypress Semiconductor Corp, CY7C63231A-PXC Datasheet - Page 9

• Manufacturer Part Number: CY7C63231A-PXC
• Description: IC MCU 3K USB LS PERIPH 18-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™r

Specifications of CY7C63231A-PXC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (3 kB)
• Controller Series: CY7C632xx
• Ram Size: 96 x 8
• Interface: USB
• Number Of I /o: 10
• Voltage - Supply: 3.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Processor Series: CY7C63xx
• Core: M8B
• Data Bus Width: 16 bit
• Program Memory Size: 3 KB
• Data Ram Size: 96 B
• Interface Type: PS2, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 10
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

The call subroutine (CALL) instruction stores the program counter and flags on the program stack and increments the PSP by two.
The return from subroutine (RET) instruction restores the program counter, but not the flags, from program stack and decrements
the PSP by two.
6.5
The data stack pointer (DSP) supports PUSH and POP instructions that use the data stack for temporary storage. A PUSH
instruction will pre-decrement the DSP, then write data to the memory location addressed by the DSP. A POP instruction will read
data from the memory location addressed by the DSP, then post-increment the DSP.
During a reset, the Data Stack Pointer will be set to zero. A PUSH instruction when DSP equals zero will write data at the top of
the data RAM (address 0xFF). This would write data to the memory area reserved for a FIFO for USB endpoint 0. In non-USB
applications, this works fine and is not a problem.
For USB applications, the firmware should set the DSP to an appropriate location to avoid a memory conflict with RAM dedicated
to USB FIFOs. Since there are only 80 bytes of RAM available (except Endpoint FIFOs) the DSP should be set between 0x00
and 0x4Fh. The memory requirements for the USB endpoints are shown in Section 8.2. For example, assembly instructions to
set the DSP to 20h (giving 32 bytes for program and data stack combined) are shown below:
6.6
The microcontroller supports three addressing modes for instructions that require data operands: data, direct, and indexed.
6.6.1
The “Data” address mode refers to a data operand that is actually a constant encoded in the instruction. As an example, consider
the instruction that loads A with the constant 0x30:
This instruction will require two bytes of code where the first byte identifies the “MOV A” instruction with a data operand as the
second byte. The second byte of the instruction will be the constant “0xE8h”. A constant may be referred to by name if a prior
“EQU” statement assigns the constant value to the name. For example, the following code is equivalent to the example shown
above:
6.6.2
“Direct” address mode is used when the data operand is a variable stored in SRAM. In that case, the one byte address of the
variable is encoded in the instruction. As an example, consider an instruction that loads A with the contents of memory address
location 0x10h:
In normal usage, variable names are assigned to variable addresses using “EQU” statements to improve the readability of the
assembler source code. As an example, the following code is equivalent to the example shown above:
6.6.3
“Indexed” address mode allows the firmware to manipulate arrays of data stored in SRAM. The address of the data operand is
the sum of a constant encoded in the instruction and the contents of the “X” register. In normal usage, the constant will be the
“base” address of an array of data and the X register will contain an index that indicates which element of the array is actually
addressed:
This would have the effect of loading A with the fourth element of the SRAM “array” that begins at address 0x10h. The fourth
element would be at address 0x13h.
Document #: 38-08028 Rev. *B
• MOV A, 30h
• DSPINIT: EQU 30h
• MOV A,DSPINIT
• MOV A, [10h]
• buttons: EQU 10h
• MOV A,[buttons]
• array: EQU 10h
• MOV X,3
• MOV A,[x+array]
MOV A,20h
SWAP A,DSP ; swap accumulator value into DSP register
8-bit Data Stack Pointer (DSP)
Address Modes
Data
Direct
Indexed
; Move 20 hex into Accumulator (must be D8h or less to avoid USB FIFOs)
FOR
FOR
CY7C63221/31A
enCoRe™ USB
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