CY7C65113-SC Cypress Semiconductor Corp, CY7C65113-SC Datasheet - Page 8

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CY7C65113-SC

Manufacturer Part Number
CY7C65113-SC
Description
IC MCU 8K USB HUB 4 PORT 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C65113-SC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1331

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C65113-SC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document #: 38-08002 Rev. *D
3.0
4.0
4.1
Table 4-1. Pin Assignments
D+[0], D–[0]
D+[1], D–[1]
D+[2], D–[2]
D+[3], D–[3]
D+[4], D–[4]
P0
P1
XTAL
XTAL
V
V
GND
V
PP
CC
REF
Name
IN
OUT
Pin Assignments
Pin Configurations
Product Summary Tables
OUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
IN
5, 6
7, 8
9, 10
23, 24
21, 22
P1[7:0]
11, 15, 12, 16, 13, 17, 14, 18
P1[2:0]
25, 27, 26
2
1
19
28
4, 20
3
28-pin
XTALOUT
XTALIN
D+[0]
D+[1]
D+[2]
D–[0]
D–[1]
D–[2]
P0[7]
P0[5]
P0[3]
P0[1]
V
GND
REF
Upstream port, USB differential data.
Downstream Port 1, USB differential data.
Downstream Port 2, USB differential data.
Downstream Port 3, USB differential data.
Downstream Port 4, USB differential data.
GPIO Port 0 capable of sinking 7 mA (typical).
GPIO Port 1 capable of sinking 7 mA (typical).
6-MHz crystal or external clock input.
6-MHz crystal out.
Programming voltage supply, tie to ground during normal operation.
Voltage supply.
Ground.
External 3.3V supply voltage for the downstream differential data output
buffers and the D+ pull-up.
CY7C65113C
28-pin SOIC
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
P1[1]
P1[0]
P1[2]
D–[3]
D+[3]
D–[4]
D+[4]
GND
V
P0[0]
P0[2]
P0[4]
P0[6]
CC
PP
Description
CY7C65113C
Page 8 of 49

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