CY7C65113-SC Cypress Semiconductor Corp, CY7C65113-SC Datasheet - Page 12

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CY7C65113-SC

Manufacturer Part Number
CY7C65113-SC
Description
IC MCU 8K USB HUB 4 PORT 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C65113-SC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1331

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C65113-SC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
5.0
5.1
The 14-bit Program Counter (PC) allows access to up to 8 KB of PROM available with the CY7C65x13 architecture. The top
32 bytes of the ROM in the 8K part are reserved for testing purposes. The program counter is cleared during reset, such that the
first instruction executed after a reset is at address 0x0000h. Typically, this is a jump instruction to a reset handler that initializes
the application (see Interrupt Vectors on page 27).
The lower eight bits of the program counter are incremented as instructions are loaded and executed. The upper six bits of the
program counter are incremented by executing an XPAGE instruction. As a result, the last instruction executed within a 256-byte
“page” of sequential code should be an XPAGE instruction. The assembler directive “XPAGEON” causes the assembler to insert
XPAGE instructions automatically. Because instructions can be either one or two bytes long, the assembler may occasionally
need to insert a NOP followed by an XPAGE to execute correctly.
The address of the next instruction to be executed, the carry flag, and the zero flag are saved as two bytes on the program stack
during an interrupt acknowledge or a CALL instruction. The program counter, carry flag, and zero flag are restored from the
program stack during a RETI instruction. Only the program counter is restored during a RET instruction.
The program counter cannot be accessed directly by the firmware. The program stack can be examined by reading SRAM from
location 0x00 and up.
Document #: 38-08002 Rev. *B
Table 4-3. Instruction Set Summary (continued)
OR A,[expr]
OR A,[X+expr]
AND A,expr
AND A,[expr]
AND A,[X+expr]
XOR A,expr
XOR A,[expr]
XOR A,[X+expr]
CMP A,expr
CMP A,[expr]
CMP A,[X+expr]
MOV A,expr
MOV A,[expr]
MOV A,[X+expr]
MOV X,expr
MOV X,[expr]
reserved
XPAGE
MOV A,X
MOV X,A
MOV PSP,A
CALL
JMP
CALL
JZ
JNZ
MNEMONIC
14-bit Program Counter
Programming Model
direct
index
data
direct
index
data
direct
index
data
direct
index
data
direct
index
data
direct
addr
addr
addr
addr
addr
operand
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
40
41
60
50-5F
80-8F
90-9F
A0-AF
B0-BF
opcode
6
7
4
6
7
4
6
7
5
7
8
4
5
6
4
5
4
4
4
4
10
5
10
5 (or 4)
5 (or 4)
cycles
RLC
PUSH X
SWAP A,X
SWAP A,DSP
MOV [expr],A
MOV [X+expr],A
OR [expr],A
OR [X+expr],A
AND [expr],A
AND [X+expr],A
XOR [expr],A
XOR [X+expr],A
IOWX [X+expr]
CPL
ASL
ASR
RRC
RET
DI
EI
RETI
JC
JNC
JACC
INDEX
MNEMONIC
direct
index
direct
index
direct
index
direct
index
index
addr
addr
addr
addr
operand
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
70
72
73
C0-CF
D0-DF
E0-EF
F0-FF
opcode
CY7C65013
CY7C65113
Page 12 of 51
5
5
5
5
6
7
8
7
8
7
8
6
4
4
4
4
4
8
4
4
8
5 (or 4)
5 (or 4)
7
14
cycles

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