PIC12F508-I/P Microchip Technology, PIC12F508-I/P Datasheet - Page 31

• Manufacturer Part Number: PIC12F508-I/P
• Description: IC MCU FLASH 512X12 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F508-I/P

• Program Memory Type: FLASH
• Program Memory Size: 768B (512 x 12)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 25 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164101, DM163014, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• Package: 8PDIP
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162059 - HEADER INTRFC MPLAB ICD2 8/14PINDM163029 - BOARD PICDEM FOR MECHATRONICSDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.0
As with any other register, the I/O register(s) can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB,W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at
high-impedance) since the I/O control registers are all
set.
5.1
PORTB/GPIO is an 8-bit I/O register. Only the low-
order 6 bits are used (RB/GP<5:0>). Bits 7 and 6 are
unimplemented and read as ‘0’s. Please note that RB3/
GP3 is an input only pin. The Configuration Word can
set several I/O’s to alternate functions. When acting as
alternate functions, the pins will read as ‘0’ during a port
read. Pins RB0/GP0, RB1/GP1, RB3/GP3 and RB4
can be configured with weak pull-ups and also for
wake-up on change. The wake-up on change and weak
pull-up functions are not pin selectable. If RB3/GP3/
MCLR is configured as MCLR, weak pull-up is always
on and wake-up on change for this pin is not enabled.
5.2
PORTC is an 8-bit I/O register. Only the low-order 6 bits
are used (RC<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s.
5.3
The Output Driver Control register is loaded with the
contents of the W register by executing the TRIS f
instruction. A ‘1’ from a TRIS register bit puts the corre-
sponding output driver in a High-Impedance mode. A
‘0’ puts the contents of the output data latch on the
selected pins, enabling the output buffer. The excep-
tions are RB3/GP3, which is input only and the T0CKI
pin, which may be controlled by the OPTION register.
See Register 4-3 and Register 4-4.
The TRIS registers are “write-only” and are set (output
drivers disabled) upon Reset.
© 2009 Microchip Technology Inc.
Note:
Note:
Note:
I/O PORT
PORTB/GPIO
PORTC (PIC16F505 Only)
TRIS Registers
On the PIC12F508/509, I/O PORTB is ref-
erenced as GPIO. On the PIC16F505, I/O
PORTB is referenced as PORTB.
On power-up, TOCKI functionality is
enabled in the OPTION register and must
be disabled to allow RC5 to be used as
general purpose I/O.
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
PIC12F508/509/16F505
5.4
The equivalent circuit for an I/O port pin is shown in
Figure 5-2. All port pins, except RB3/GP3 which is
input only, may be used for both input and output oper-
ations. For input operations, these ports are non-latch-
ing. Any input must be present until read by an input
instruction (e.g., MOVF PORTB, W). The outputs are
latched and remain unchanged until the output latch is
rewritten. To use a port pin as output, the correspond-
ing direction control bit in TRIS must be cleared (= 0).
For use as an input, the corresponding TRIS bit must
be set. Any I/O pin (except RB3/GP3) can be
programmed individually as input or output.
FIGURE 5-1:
TRIS ‘f’
Data
Bus
WR
Port
W
Reg
Note 1: See Table 3-3 for buffer type.
I/O Interfacing
D
D
CK
CK
TRIS
Latch
Data
Latch
Reset
Q
Q
Q
Q
PIC12F508/509/16F505
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
RD Port
(1)
V
V
P
N
DS41236E-page 31
SS
DD
V
V
DD
SS
I/O
pin