20-668-0011 Rabbit Semiconductor, 20-668-0011 Datasheet - Page 97
![IC MPU RABIT3000A 55.5MHZ128LQFP](/photos/6/76/67659/316-128-lqfp_sml.jpg)
20-668-0011
Manufacturer Part Number
20-668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 20-668-0011
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Data Bus Width
8 bit
Maximum Clock Frequency
55.5 MHz
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Programmable I/os
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
316-1061
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
20-668-0011
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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12.1 Overview
Parallel Port E is a byte-wide port with each bit programmable for data direction. These
are simple inputs and outputs controlled and reported in the Port E Data Register (PEDR).
Each of the Parallel Port E outputs can be configured as an I/O strobe. In addition, four of
the Parallel Port E lines can be used as interrupt request inputs.
When used as outputs, the Parallel Port E bits are buffered, with the data written to PEDR
transferred to the output pins on a selected timing edge. Either the peripheral clock or the
outputs of Timer A1, Timer B1, or Timer B2 can be used for this function, with each nibble
of the port having a separate select field to control this timing. Each bit can either be pro-
grammed as open-drain or driven high and low.
Because of the buffered nature of Parallel Port E, using a read-modify-write type of opera-
tion can lead to old data being written to PEDR. To alleviate this potential problem, each
bit of the port can be written individually using a separate address for each bit.
Bit 7 of Parallel Port E is used as the default chip select input for the slave port when the
slave port is enabled, either for parallel bootstrap or under program control.
Chapter 12 Parallel Port E
Pin Name
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
Table 12-1. Parallel Port E Alternate Pin Functions
Interrupts
INT1A
INT0A
INT1B
INT0B
—
—
—
—
Inputs
12. P
Slave Port
/SCS
ARALLEL
I/O Strobes
Outputs
I7
I6
I5
I4
I3
I2
I1
I0
P
ORT
E
87
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