MPC8541ECVTALF Freescale Semiconductor, MPC8541ECVTALF Datasheet - Page 2

IC MPU POWERQUICC III 783-FCPBGA

MPC8541ECVTALF

Manufacturer Part Number
MPC8541ECVTALF
Description
IC MPU POWERQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8541ECVTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
For Use With
MPC8548CDS - DEV TOOLS CDS FOR 8548CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8541ECVTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Overview
1
The following section provides a high-level overview of the MPC8541E features.
major functional units within the MPC8541E.
1.1
The following lists an overview of the MPC8541E feature set.
2
.
MIIs/RMIIs
Overview
Embedded e500 Book E-compatible core
— High-performance, 32-bit Book E-enhanced core that implements the PowerPC architecture
— Dual-issue superscalar, 7-stage pipeline design
— 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection
— Lockable L1 caches—entire cache or on a per-line basis
— Separate locking for instructions and data
— Single-precision floating-point operations
— Memory management unit especially designed for embedded applications
— Enhanced hardware and software debug support
— Dynamic power management
— Performance monitor facility
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
SDRAM
GPIO
IRQs
Key Features
32b
DDR
I/Os
DDR SDRAM Controller
Local Bus Controller
Interrupt Controller
Programmable
I
2
C Controller
CPM
FCC
FCC
DUART
SPI
I2C
Generators
Parallel I/O
Baud Rate
I-Memory
Controller
Interrupt
DPRAM
Engine
Timers
Serial
CPM
ROM
RISC
DMA
Figure 1. MPC8541E Block Diagram
Coherency
Module
OCeaN
Security
e500
Engine
Core Complex
256 Kbyte
L2 Cache/
SRAM
Bus
64/32b PCI Controller
0/32b PCI Controller
10/100/1000 MAC
10/100/1000 MAC
DMA Controller
32-Kbyte L1
I Cache
Figure 1
e500 Core
Freescale Semiconductor
MII, GMII, TBI,
RTBI, RGMIIs
32-Kbyte L1
D Cache
shows the

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