Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 108

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Standby Mode Exit With Bus Request
Optionally, if the BRXT bit of the Standby Mode Control
Register (SMCR) was previously set, /STNBY goes to logic
1 when the /BREQ input is asserted, allowing the external
crystal oscillator that drives the Z380 MPU’s CLK input to
restart. A warm-up counter internal to the Z380 MPU
proceeds to count, for a duration long enough for the
oscillator to stabilize, which was selected with the WM bits
in the SMCR. When the counter reaches its end-count,
clocking resumes within the Z380 MPU and at the BUSCLK
and IOCLK outputs.
ADDRESS
BUSCLK
/STNBY
CNTLS
/BREQ
IOCLK
/BACK
DATA
BUS
FFFFFFFFH
Figure 52. Standby Mode Exit with Bus Request Timing
The Z380 MPU relinquishes the system bus after clocking
resumes, with the normal /BREQ, /BACK handshake pro-
cedure. The Z380 MPU regains the system bus when
/BREQ goes inactive, again going through a normal hand-
shake procedure.
Note that clocking continues, and the Z380 MPU is at the
halt state.
Bus Release
Page 108 of 125
Halt
State