MC68EC000EI20 Freescale Semiconductor, MC68EC000EI20 Datasheet - Page 186
MC68EC000EI20
Manufacturer Part Number
MC68EC000EI20
Description
IC MPU 32BIT 20MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI20
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Integer Instructions
CMP2
Operation:
Assembler
Syntax:
Attributes:
Description: Compares the value in Rn to each bound. The effective address contains the
Condition Codes:
4-82
bounds pair: upper bound following the lower bound. For signed comparisons, the
arithmetically smaller value should be used as the lower bound. For unsigned
comparisons, the logically smaller value should be the lower bound.
The size of the data and the bounds can be specified as byte, word, or long. If Rn is a
data register and the operation size is byte or word, only the appropriate low-order part
of Rn is checked. If Rn is an address register and the operation size is byte or word,
the bounds operands are sign-extended to 32 bits, and the resultant operands are
compared to the full 32 bits of An.
If the upper bound equals the lower bound, the valid range is a single value.
X — Not affected.
N — Undefined.
Z — Set if Rn is equal to either bound; cleared otherwise.
V — Undefined.
C — Set if Rn is out of bounds; cleared otherwise.
—
X
This instruction is identical to CHK2 except that it sets condition
codes rather than taking an exception when the value in Rn is
out of bounds.
N
U
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Compare Rn < LB or Rn > UB and Set Condition Codes
CMP2 < ea > ,Rn
Size = (Byte, Word, Long)
Z
Compare Register Against Bounds
(MC68020, MC68030, MC68040, CPU32)
V
U
C
NOTE
CMP2
MOTOROLA
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