MC68EC000EI20 Freescale Semiconductor, MC68EC000EI20 Datasheet - Page 447
MC68EC000EI20
Manufacturer Part Number
MC68EC000EI20
Description
IC MPU 32BIT 20MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI20
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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FTRAPcc
Operation:
Assembler
Syntax:
Attributes:
Description: If the selected condition is true, the processor initiates exception processing.
Floating-Point Status Register:
MOTOROLA
A vector number is generated to reference the TRAPcc exception vector. The stacked
program counter points to the next instruction. If the selected condition is not true, there
is no operation performed and execution continues with the next instruction in
sequence. The immediate data operand is placed in the word(s) following the
conditional predicate word and is available for user definition for use within the trap
handler.
The conditional specifier cc selects one of the 32 conditional tests defined in 3.6.2
Conditional Testing.
Condition Codes:
Quotient Byte:
Exception Byte:
Accrued Exception Byte:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If Condition True
FTRAPcc
FTRAPcc.W # < data >
FTRAPcc.L # < data >
Size = (Word, Long)
Then TRAP
Trap on Floating-Point Condition
Not affected.
Not affected.
BSUN
SNAN
OPERR
OVFL
UNFL
DZ
INEX2
INEX1
The IOP bit is set if the BSUN bit is set in the exception
byte; no other bit is affected.
(MC6888X, MC68040)
Set if the NAN condition code is set and the
condition selected is an IEEE nonaware test.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Not Affected.
Floating Point Instructions
FTRAPcc
5-145
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