MPC8245LVV266D Freescale Semiconductor, MPC8245LVV266D Datasheet - Page 16

• Manufacturer Part Number: MPC8245LVV266D
• Description: IC MPU 32BIT 266MHZ PPC 352-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of MPC8245LVV266D

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 266MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 352
• Supply Voltage Range: 1.7V To 2.1V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Electrical and Thermal Characteristics
Register settings that define each DLL mode are shown in
The DLL_MAX_DELAY bit can lengthen the amount of time through the delay line by increasing the
time between each of the 128 tap points in the delay line. Although this increased time makes it easier to
guarantee that the reference clock is within the DLL lock range, there may be slightly more jitter in the
output clock of the DLL; that is, the phase comparator shifts the clock between adjacent tap points. Refer
to the Freescale application note AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines:
Part 1, for details on DLL modes and memory design.
The value of the current tap point after the DLL locks can be determined by reading bits 6–0
(DLL_TAP_COUNT) of the DLL tap count register (DTCR, located at offset 0xE3). These bits store the
value (binary 0 through 127) of the current tap point and can indicate whether the DLL advances or
decrements as it maintains the DLL lock. Therefore, for evaluation purposes, DTCR can be read for all
DLL modes that support the T
SDRAM_SYNC_IN. The DLL mode with the smallest tap point value in the DTCR should be used
because the bigger the tap point value, the more jitter that can be expected for clock signals. Note that
keeping a DLL mode that is locked below tap point decimal 12 is not recommended.
16
Normal tap delay,
No DLL extend
Normal tap delay,
DLL extend
Max tap delay,
No DLL extend
Max tap delay,
DLL extend
DLL Mode
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
loop
value used for the trace length of SDRAM_SYNC_OUT to
Table 9. DLL Mode Definition
Bit 2 of Configuration
Register at 0x76
0
0
1
1
Table
9.
Bit 7 of Configuration
Register at 0x72
0
1
0
1
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