XPC8260CZUHFBC Freescale Semiconductor, XPC8260CZUHFBC Datasheet - Page 13

IC MPU POWERQUICC II 480-TBGA

XPC8260CZUHFBC

Manufacturer Part Number
XPC8260CZUHFBC
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheets

Specifications of XPC8260CZUHFBC

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
166MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
133MHz
Embedded Interface Type
I2C, MII, SPI, TDM, UTOPIA
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
166MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
480
Package Type
TBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XPC8260CZUHFBC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
where K is a constant pertaining to the particular part. K can be determined from equation (3) by measuring
P
solving equations (1) and (2) iteratively for any value of T
2.3.1
Each V
pin should likewise be provided with a low-impedance path to ground. The power supply pins drive
distinct groups of logic on chip. The V
0.1 µF by-pass capacitors located as close as possible to the four sides of the package. The capacitor leads
and associated printed circuit traces connecting to chip V
inch per capacitor lead. A four-layer board is recommended, employing two inner layers as V
planes.
All output pins on the MPC826xA have fast rise and fall times. Printed circuit (PC) trace interconnection
length should be minimized in order to minimize overdamped conditions and reflections caused by these
fast output switching times. This recommendation particularly applies to the address and data buses.
Maximum PC trace lengths of six inches are recommended. Capacitance calculations should consider all
device loads as well as parasitic capacitances due to the PC traces. Attention to proper PCB layout and
bypassing becomes especially critical in systems with higher capacitive loads because these loads create
higher transient currents in the V
inputs during reset. Special care should be taken to minimize the noise levels on the PLL supply pins.
Table 5
thermal management is required for conditions above P
or greater) to ensure the junction temperature does not exceed the maximum specified value. Also note
that the I/O power should be included when determining whether to use a heat sink.
Freescale Semiconductor
D
(at equilibrium) for a known T
1
2
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
CC
provides preliminary, estimated power dissipation for various configurations. Note that suitable
Test temperature = room temperature (25
P
(MHz)
66.66
66.66
66.66
66.66
83.33
83.33
83.33
Bus
INT
pin should be provided with a low-impedance path to the board’s power supply. Each ground
Layout Practices
= I
DD
x V
Multiplier
CPM
Table 5. Estimated Power Dissipation for Various Configurations
DD
2.5
2.5
2
3
3
2
2
Watts
Core CPU
Multiplier
4.5
3.5
3
3
4
3
3
CC
A
. Using this value of K
and GND circuits. Pull up all unused inputs or signals that will be
CC
(MHz)
CPM
133
166
200
200
166
166
208
power supply should be bypassed to ground using at least four
°
C)
(MHz)
CPU
200
200
266
300
250
250
291
D
CC
= 3 W (when the ambient temperature is 70 °C
,
A
the values of P
Nominal
.
and ground should be kept to less than half an
1.2
1.3
Vddl 1.8 Volts
Maximum
2.1
2
D
P
Electrical and Thermal Characteristics
INT
and T
(W)
Nominal
2
J
1.8
1.9
2.3
2.4
2.2
2.2
2.4
Vddl 2.0 Volts
can be obtained by
1
Maximum
CC
2.3
2.3
2.9
3.1
2.8
2.8
3.1
and GND
13

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