XPC8260CZUHFBC Freescale Semiconductor, XPC8260CZUHFBC Datasheet - Page 26

• Manufacturer Part Number: XPC8260CZUHFBC
• Description: IC MPU POWERQUICC II 480-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of XPC8260CZUHFBC

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 166MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 480-TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 133MHz
• Embedded Interface Type: I2C, MII, SPI, TDM, UTOPIA
• Digital Ic Case Style: TBGA
• No. Of Pins: 480
• Rohs Compliant: No
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 166MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 480
• Package Type: TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Clock Configuration Modes
3.2
The MPC8265 and the MPC8266 have three clocking modes: local, PCI host, and PCI agent. The clocking
mode is set according to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK—as shown in
Table
In addition, note the following:
26
1
2
3
MODCK_H–MODCK[1–3]
Because of speed dependencies, not all of the possible configurations in
The user should choose the input clock frequency and the multiplication factors such that the frequency of the CPU
is equal to or greater than 150 MHz and the CPM ranges between 66–233 MHz.
Input clock frequency is given only for the purpose of reference. The user should set MODCK_H–MODCK_L so that
the resulting configuration does not exceed the frequency rating of the user’s part.
15.
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
PCI Mode
1000_001
1000_010
1000_011
1000_100
PCI_MODE
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum Tval = 1
when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
Clock configurations change only after POR is asserted.
1
0
0
0
0
PCI_CFG[0]
Frequency
Table 14. Clock Configuration Modes
Table 15. MPC8265 and MPC8266 Clocking Modes
Input Clock
Pins
—
66 MHz
66 MHz
66 MHz
66 MHz
0
0
1
1
2,3
PCI_MODCK
NOTE: Tval (Output Hold)
CPM Multiplication
NOTE: PCI_MODCK
—
0
1
0
1
Factor
3.5
3.5
3.5
3.5
NOTE
2
Clocking Mode
PCI agent
Local bus
PCI host
Frequency
233 MHz
233 MHz
233 MHz
233 MHz
CPM
1
(continued)
Table 14
2
Core Multiplication
are applicable.
Frequency Range
Factor
3.5
4.5
PCI Clock
3
4
(MHZ)
50–66
25–50
50–66
25–50
—
2
Freescale Semiconductor
Frequency
200 MHz
233 MHz
266 MHz
300 MHz
Core
2