MC68020CRC16E Freescale Semiconductor, MC68020CRC16E Datasheet - Page 144

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MC68020CRC16E

Manufacturer Part Number
MC68020CRC16E
Description
IC MICROPROCESSOR 32BIT 114-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68020CRC16E

Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
114-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16.67MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
114
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68020CRC16E
Manufacturer:
MOT
Quantity:
10
MOTOROLA
Priority
NOTE: 0.0 is the highest priority; 4.2 is the lowest.
Group/
0
1
2
3
4
0.0—Reset
1.0—Address Error
1.1—Bus Error
2.0—BKPT, CALLM, CHK, CHK2,
3.0—Illegal Instruction, Line A, Unimplemented
4.0—cp Postinstruction
4.1—Trace
4.2—Interrupt
PIPE STAGE D
cp Midinstruction, cp Protocol Violation,
cpTRAPcc, Divide by Zero, RTE, RTM,
TRAP, TRAPcc, TRAPV
Line F, Privilege Violation, cp Preinstruction
Exception and Relative Priority
EXECUTE INSTRUCTION WORD
Figure 6-6. Breakpoint Instruction Flowchart
INSTRUCTION WORD ON DATA BUS
Freescale Semiconductor, Inc.
Table 6-4. Exception Priority Groups
For More Information On This Product,
EXIT
CYCLE TERMINATED WITH
DSACK1/DSACK0
Go to: www.freescale.com
M68020 USER’S MANUAL
A4–A2
INITIATE READ BUS CYCLE
A19–A16
BREAKPOINT NUMBER
ENTRY
Aborts all processing (instruction or exception) and
does not save old context.
Suspends processing (instruction or exception) and
saves internal context.
Exception processing is part of instruction execution.
Exception processing begins before instruction is
executed.
Exception processing begins when current instruction
or previous exception processing has completed.
$0
CYCLE TERMINATED WITH
BERR
TAKE ILLEGAL INSTRUCTION
Characteristic
EXCEPTION
6- 19

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