PCX745BVZFU350LE Atmel, PCX745BVZFU350LE Datasheet - Page 5

no-image

PCX745BVZFU350LE

Manufacturer Part Number
PCX745BVZFU350LE
Description
IC MPU 32BIT 350MHZ 255PBGA
Manufacturer
Atmel
Datasheet

Specifications of PCX745BVZFU350LE

Processor Type
PowerPC 32-Bit RISC
Speed
350MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
255-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCX745BVZFU350LE
Manufacturer:
Atmel
Quantity:
10 000
2138G–HIREL–05/06
• Memory Management Unit
• Bus Interface
• Power Management
• Testability
• Integrated Thermal Management Assist Unit
– Copyback or write-through data cache (on a page basis, or for all L2)
– Instruction-only mode and data-only mode.
– 64 bytes (256K/512K) or 128 bytes (1M) sectored line size
– Supports flow through (register-buffer) synchronous burst SRAMs, pipelined
– L2 configurable to direct mapped SRAM interface or split cache/direct mapped or
– Core-to-L2 frequency divisors of 1, 1.5, 2, 2.5, and 3 supported
– 64-bit data bus
– Selectable interface voltages of 2.5V and 3.3V
– Parity checking on both L2 address and data
– 128 entry, 2-way set associative instruction TLB
– 128 entry, 2-way set associative data TLB
– Hardware reload for TLBs
– Hardware or optional software tablewalk support
– 8 instruction BATs and 8 data BATs
– 8 SPRGs, for assistance with software tablewalks
– Virtual memory support for up to 4 hexabytes (2
– Real memory support for up to 4 gigabytes (2
– Compatible with 60X processor interface
– 32-bit address bus
– 64-bit data bus, 32-bit mode selectable
– Bus-to-core frequency multipliers of 2x, 3x, 3.5x, 4x, 4.5x, 5x, 5.5x, 6x, 6.5x, 7x,
– Selectable interface voltages of 2.5V and 3.3V.
– Parity checking on both address and data busses
– Low-power design with thermal requirements very similar to PC740/750.
– Selectable interface voltage of 1.8V/2.0V can reduce power in output buffers
– Three static power saving modes: doze, nap, and sleep
– Dynamic power management
– LSSD scan design
– IEEE 1149.1 JTAG interface
– One-ship thermal sensor and control logic
– Thermal Management Interrupt for software regulation of junction temperature
(register-register) synchronous burst SRAMs (3-1-1-1 or strobeless 4-1-1-1) and
pipelined (register-register) late-write synchronous burst SRAMs
private memory
7.5x, 8x, 10x supported
(compared to 3.3V)
32
) of physical memory
52
) of virtual memory
PC755/745
5

Related parts for PCX745BVZFU350LE