PCX755BVZFU300LE Atmel, PCX755BVZFU300LE Datasheet - Page 2

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PCX755BVZFU300LE

Manufacturer Part Number
PCX755BVZFU300LE
Description
IC MPU 32BIT 300MHZ 360PBGA
Manufacturer
Atmel
Datasheet

Specifications of PCX755BVZFU300LE

Processor Type
PowerPC 32-Bit RISC
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
360-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCX755BVZFU300LE
Manufacturer:
Atmel
Quantity:
10 000
Screening
1. General Description
1.1
Figure 1-1.
2
Completion Unit
Reorder Buffer
Reservation Station Reservation Station Reservation Station
(6-Entry)
Integer Unit 1
Additional Features
* Time Base Counter/Decrementer
* Clock Multiplier
* JTAG/COP Interface
* Thermal/Power Management
* Performance Monitor
Simplified Block Diagram
+ x :
PC755/745
PC755 Block Diagram
2 Instructions
32-Bit
Integer Unit 2
+
This product is manufactured in full compliance with:
The PC755 is targeted for low power systems and supports power management features such
as doze, nap, sleep, and dynamic power management. The PC755 consists of a processor core
and an internal L2 Tag combined with a dedicated L2 cache interface and a 60x bus.
• HiTCE CBGA according to Atmel standards
• CBGA + CI-CGA + FC-PBGA up screenings based upon Atmel standards
• Full military temperature ranges (T
• Industrial temperature ranges (T
(Original)
DTLB
System Register
SRs
Data MMU
Unit
Instruction Queue
Fetcher
DBAT
Array
(6-Word)
CR
32-Bit
Dispatch Unit
Rename Buffers
Instruction Unit
GPR File
PA
(6)
Tags
EA
32-Bit Address Bus
Branch Processing
32-/64-Bit Data Bus
64-Entry
64-Bit
(2 Instructions)
32-Bit
32-Kbyte
D Cache
J
BTIC
BHT
= -40°C, +110°C)
64-Bit
J
Unit
= -55°C, +125°C)
Reservation Station
Load/Store Unit
(EA Calculation)
Store Queue
(2-Entry)
CTR
LR
Instruction Fetch Queue
+
60x Bus Interface Unit
L1 Castout Queue
Data Load Queue
17-Bit L2 Address Bus
64-Bit L2 Data Bus
64-Bit
Rename Buffers
(Shadow)
Instruction MMU
FPR File
ITLB
SRs
(6)
L2 Bus Interface
L2 Castout Queue
Array
IBAT
64-Bit
Unit
Reservation Station
Floating-Point
Not in the PC745
FPSCR
+ x :
FPSCR
(4 Instructions)
Unit
2138G–HIREL–05/06
Tags
L2 Controller
128-Bit
L2 Tags
L2CR
32-Kbyte
I Cache

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