N80960SB16 Intel, N80960SB16 Datasheet - Page 20

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N80960SB16

Manufacturer Part Number
N80960SB16
Description
IC MPU I960SB 16MHZ 84-PLCC
Manufacturer
Intel
Datasheet

Specifications of N80960SB16

Rohs Status
RoHS non-compliant
Processor Type
i960
Features
SB suffix, 32-Bit, 512 Byte Cache
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
84-PLCC
Other names
803883

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80960SB
16
Input Clock
T
T
T
T
T
Synchronous Outputs
T
T
T
T
T
Synchronous Inputs
T
T
T
T
T
T
T
T
NOTES:
1. Processor clock (CLK2) rise time and fall time are not tested.
2. A float condition occurs when the maximum output current becomes less than I
3. Meeting RESET setup and hold times is an optional method of synchronizing your clocks. If you decide to use an asyn-
Symbol
1
2
3
4
5
6
6AS
7
8
9
10
11
12
13
14
15
16
17
no longer than the valid delay.
chronous reset, synchronizing the clock can be accomplished by using AS.
Processor Clock Period (CLK2)
Processor Clock Low Time (CLK2)
Processor Clock High Time
(CLK2)
Processor Clock Fall Time (CLK2)
Processor Clock Rise Time (CLK2)
Output Valid Delay
AS Output Valid Delay
ALE Width
ALE Output Valid Delay
Output Float Delay
Input Setup 1
Input Hold
Input Setup 2
Setup to ALE Inactive
Hold after ALE Inactive
RESET Hold
RESET Setup
RESET Width
Parameter
Table 7. 80960SB AC Characteristics (10 MHz)
T
2050
Min
1
50
10
13
10
8
8
2
2
4
2
2
8
3
5
- 11
Max
125
10
10
31
25
33
20
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LO
. Float delay is not tested, but should be
V
V
V
V
V
(2)
(3)
(3)
41 CLK2 Periods Minimum
IN
T
T
T
T
= 1.5V
= 10% Point
= V
= 90% Point
= V
= 90% to 10% Point (1)
= 10% to 90% Point (1)
CL
CL
+ (V
+ (V
Notes
CH
CH
– V
– V
CL
CL
) x 0.1
) x 0.9

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