MPC852TVR50 Freescale Semiconductor, MPC852TVR50 Datasheet - Page 56

IC MPU POWERQUICC 50MHZ 256-PBGA

MPC852TVR50

Manufacturer Part Number
MPC852TVR50
Description
IC MPU POWERQUICC 50MHZ 256-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC852TVR50

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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FEC Electrical Characteristics
15 FEC Electrical Characteristics
This section provides the AC electrical specifications for the fast Ethernet controller (FEC). Note that the timing
specifications for the MII signals are independent of system clock frequency (part speed designation). Also, MII
signals use TTL signal levels compatible with devices operating at either 5.0 V or 3.3 V.
15.1 MII Receive Signal Timing (MII_RXD[3:0], MII_RX_DV,
The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25MHz +1%. There is no minimum
frequency requirement. In addition, the processor clock frequency must exceed the MII_RX_CLK frequency - 1%.
Table 25
56
SPIMISO
SPIMOSI
(Output)
SPICLK
SPICLK
SPISEL
(Input)
(Input)
(Input)
(Input)
Num
(CI=0)
(CI=1)
M1
M2
M3
M4
MII_RX_ER, MII_RX_CLK)
provides information on the MII receive signal timing.
MII_RXD[3:0], MII_RX_DV, MII_RX_ER to MII_RX_CLK setup
MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold
MII_RX_CLK pulse width high
MII_RX_CLK pulse width low
173
Undef
177
175
171
173
Figure 57. SPI Slave (CP = 1) Timing Diagram
msb
msb
MPC852T Hardware Specifications, Rev. 3.1
Characteristic
Table 25. MII Receive Signal Timing
176
182
170
179
Data
Data
180
181
181
182
172
181
182
lsb
lsb
35%
35%
Min
5
5
178
174
Max
65%
65%
Freescale Semiconductor
MII_RX_CLK period
MII_RX_CLK period
Unit
ns
ns
msb
msb

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