MAX9853ETM+ Maxim Integrated Products, MAX9853ETM+ Datasheet - Page 25

IC CODEC AUDIO STEREO 48TQFN

MAX9853ETM+

Manufacturer Part Number
MAX9853ETM+
Description
IC CODEC AUDIO STEREO 48TQFN
Manufacturer
Maxim Integrated Products
Type
Stereo Audior
Datasheet

Specifications of MAX9853ETM+

Data Interface
Serial
Resolution (bits)
18 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
81.5 / 88
Dynamic Range, Adcs / Dacs (db) Typ
82 / 87.5
Voltage - Supply, Analog
2.6 V ~ 3.3 V
Voltage - Supply, Digital
1.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Conversion Rate
48 KHz
Resolution
18 bit
Operating Supply Voltage
1.7 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Snr
75 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Stereo Audio CODECs with Microphone, DirectDrive
MAX9851
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Headphones, Speaker Amplifiers, or Line Outputs
PIN
MAX9853
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
______________________________________________________________________________________
SDOUTS1
SDOUTS2
LRCLKS1
LRCLKS2
BCLKS1
BCLKS2
CPGND
SDINS1
SDINS2
CPV
NAME
DGND
DV
C1N
SDA
C1P
SCL
DD
DD
Charge-Pump Flying Capacitor Negative Terminal. Connect a 0.22µF ceramic capacitor
between C1N and C1P.
Charge-Pump Ground
Charge-Pump Flying Capacitor Positive Terminal. Connect a 0.22µF ceramic capacitor
between C1N and C1P.
Charge-Pump Positive Power-Supply Input. Bypass to CPGND with a 1µF capacitor.
I
swing.
I
output swing.
Primary Interface Digital Audio Serial Data DAC Input. Voiceband filtering available on this
input.
Primary Interface Digital Audio Serial Data ADC Output. Voiceband filtering available on
this output.
Primary Interface Digital Audio Bit Clock Input/Output. BCLKS1 is an input when the
MAX9851/MAX9853 is in slave mode and an output when in master mode.
Primary Interface Digital Audio Left-Right Clock Input/Output. LRCLKS1 is the audio
sample rate clock and determines whether the audio data on SDINS1 is routed to the left
or right channel. LRCLKS1 is an input when the MAX9851/MAX9853 is in slave mode and
an output when in master mode.
Digital Ground
Digital Power-Supply Input. DV
the primary digital audio interface. Bypass to DGND with a 1µF capacitor.
Secondary Interface Digital Audio Left-Right Clock Input/Output. LRCLKS2 is the audio
sample rate clock and determines whether the audio data on SDINS2 is routed to the left
or right channel. LRCLKS2 is an input when the MAX9851/MAX9853 is in slave mode and
an output when in master mode.
Secondary Interface Digital Audio Bit Clock Input/Output. BCLKS2 is an input when the
MAX9851/MAX9853 is in slave mode and an output when in master mode.
Secondary Interface Digital Audio Serial Data ADC Output
Secondary Interface Digital Audio Serial Data DAC Input
2
2
C-Compatible Serial Clock Input. Connect a 10kΩ pullup resistor to DV
C-Compatible Serial Data Input/Output. Connect a 10kΩ pullup resistor to DV
DD
provides power to the digital core, the I
FUNCTION
Pin Description (continued)
DD
2
C interface and
for full output
DD
for full
25

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