ADV611JST Analog Devices Inc, ADV611JST Datasheet - Page 42
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ADV611JST
Manufacturer Part Number
ADV611JST
Description
IC CODEC DIGITAL CCTV 120LQFP
Manufacturer
Analog Devices Inc
Type
Video Codecr
Datasheet
1.ADV611JSTZ.pdf
(46 pages)
Specifications of ADV611JST
Rohs Status
RoHS non-compliant
Data Interface
Serial
Resolution (bits)
8 b
Sigma Delta
No
Voltage - Supply, Digital
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
120-LQFP
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ADV611/ADV612
Host Interface (Compressed Data) Register Timing
The diagrams in this section show transfer timing for host read and write transfers to the ADV611/ADV612’s Compressed Data
register. Accesses to the Compressed Data register are faster than access timing for the Indirect Address, Indirect Register Data, and
Interrupt Mask/Status registers. For information on access timing for the other registers, see the Host Interface (Indirect Address,
Indirect Register Data, and Interrupt Mask/Status) Register Timing section. Also note that as long as your system observes the RD
or WR signal assertion timing, your system does NOT have to wait for the ACK signal between new compressed data addresses.
Parameter
t
t
t
t
t
t
t
t
t
RD_CD_RDC
RD_CD_PWA
RD_CD_PWD
ADR_CD_RDS
ADR_CD_RDH
DATA_CD_RDD
DATA_CD_RDOH
ACK_CD_RDD
ACK_CD_RDOH
(I) ADR, BE, CS
(O) DATA
(O) ACK
(I) RD
Description
RD Signal, Compressed Data Direct Register, Read Cycle Time
RD Signal, Compressed Data Direct Register, Pulsewidth Asserted
RD Signal, Compressed Data Direct Register, Pulsewidth Deasserted
ADR Bus, Compressed Data Direct Register, Read Setup
ADR Bus, Compressed Data Direct Register, Read Hold (at 27 MHz VCLK)
DATA Bus, Compressed Data Direct Register, Read Delay
DATA Bus, Compressed Data Direct Register, Read Output Hold
ACK Signal, Compressed Data Direct Register, Read Delay
ACK Signal, Compressed Data Direct Register, Read Output Hold
Table XXVIII. Host (Compressed Data) Read Timing Parameters
Figure 34. Host (Compressed Data) Read Transfer Timing
t
ADR CD RDS
t
RD CD PWA
VALID
VALID
t
RD CD RDC
t
ACK CD RDOH
–42–
t
t
t
DATA CD RDOH
RD CD PWD
ADR CD RDH
t
VALID
DATA CD RDD
t
ACK CD RDD
VALID
Min
28
10
10
2
2
N/A
18
N/A
9
Max
N/A
N/A
N/A
N/A
N/A
10
N/A
18
N/A
REV. 0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns